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REPORT PP-T-9672-I 




REPORT EP-T- 9672 -I 


UNITED STATES ARMY 



FRANKFORD 

ARSENAL 

THE PROCESSES AMD DEVELOPMENT OF TECHNIQUES OF 
MINIATURIZED GOID PLATED THROUGH HOLES 
IN PRINTED CIRCUITS 

by 

ROBERT P. HOGAN 
and 

BERNARD STEPANSKt 


uSi'aiHitu:' 

I 1 



MAY 1963 


PHILADELPHIA 37, PA. 


Qualified requesters may obtain copies of this report from 

ASTTA. 


The findings in this report are not to be construed as an 
official Department of the Amy position# 



U.S. AEMT 
FRANKFORD ARSENAL 
PHILADELPHIA 37, PENNSYLVANIA 


PP-T-9672-1 
MAY 1963 


THE PROCESSES AND DEVELOPMENT OF TECHNIQUES OF MINIATURIZED 
GOLD PLATED THROTGH HOLES IN PRINTED CIRCUITS 


Prepared by: cg&rf- E iLu*j 

mm ' p : wm 

Electronic Engineer 


Chief, Proc & Equip Unit 



Chief, Prod Bigr Br 



ABSTRACT 


This report describes the techniques developed and the procedures used 
successfully copper, nickel and gold plating small (0.0{j0", 0.031", 0*020'* 
and 0 . 016 ") diameter plated through holes utilised as interface (side-to-side) 
connections in double sided printed circuit boards. 


ii 



TABLE 0? OONTTiJlTS 


Section Title 

Page No. 

ABSTRACT. ii 

INTRODUCTION. 1 

HtOCEDUHE , • .. 2 

RESULTS AND DISCUSSION. 3 

CONCLUSIONS . U 

BIBLIOGRAPHY. 23 

DISTRIBUTION.2U 


iii 










INTRODUCTION 


In the initial stages of printed circuit manufacturing only one side of 
the insulator had a conductive pattern. These single sided boards were basic 
and presented no great difficulty in fabrication but because of geometric and 
space considerations they were limited in militarv application. It thus became 
necessary in the evolutionary chain to utilise both sides of the insulated board 
for a conductive pattern. This resulted in a printed circuit board that had cop¬ 
per foil on both sides. 

Initially, eyelets were used to make the interface (side-to-side) connections 
on the double sided circuit boards because of their ready accessibility and theo¬ 
rized ability to make positive mechanical contact between the copper conductive 
patterns. This technique was deemed adequate for the initial double sided circuit 
boards produced, but fabrication costs increased rapidly and a tendency toward weak¬ 
ening of the structural characteristics of the board itself was noted as circuit 
configurations became much more complex and the number of holes for side-to-side 
connections increased in conjunction with pattern complexity. 

As with all militarily applicable components, the circuit board was subject 
to stringent environmental tests. As a result of these tests, a controversy arose 
as to the eyelet's ability, to successfully expand and contract at the same rate 
as the conductive pattern. This controversy accelerated the development of sophis¬ 
ticated plating processes which emphasized chemical reduction techniques as a means 
of depositing a metallic film on plastic. 

Initially, metal plating was not stressed in double sided circuit board fabri¬ 
cation because of the problems encountered in metal to plastic deposition. The 
standard electrolytic copper baths were not acceptable because they could not deposit 
an adhering metal coat upon the plastic insulator. These electrolytic baths lacked 
the necessary activating and reducing agents to insure metal adhesion within the inter¬ 
face connecting holes. The problem was solved by the development of techniques which 
chemically activated the plastic to receive an adhering metallic film on the non- 
conductive substrate. The activating technique consisted of utilizing a chemical 
reducing (electroless) process for depositing a very thin layer of conductive copper 
to prepare the interface connections for the subsequent electrolytic copper plating. 
This electroless process made the side-to-side connections conductive for subsequent 
plating operations. 

To accommodate standard component leads the ,0J>2 inch drilled hole was utilized 
as the interface connection in developing the initial chemical reduction process for 
double sided printed circuit boards. With the advent of semiconductor devices (tran¬ 
sistors, diodes, rectifiers, etc.) and microminiaturization techniques applicable to 
military circuit boards it became evident that much smaller side-to-side connections 
would be required and these connections in turn required the establishment of refined 
methods for making the small (.OliO", .031", .020", and .016") diameter through holes. 


1 



In conjunction with the smaller through hole plating techniques, metals 
other then copper were being requisitioned for military requirements for double 
sided circuit boards. Nickel and gold were required to give greater film hard¬ 
ness, etch resistance, electrical conductivity, solderability, non-galling of 
mating contacts, wear and corrosion resistance. 


PBDCEWHE 


The program was conveniently divided into four experiments, one for each 
size hole. The procedire for each test was identical except for the plating 
times which were varied. Sixty glass epoxy (G10) printed circuit boards, cop¬ 
per laminated on both sides, size 3" x 2^", were cut to size and ten holes were 
accurately drilled in each board according to the engineering design with the 
aid of a master template which contained the circuit nattem. The holes were 
carefully deburred by hand using fine emery cloth. These holes when plated con¬ 
nected the two copper foils. All the plating and accessory baths were made up 
and brouf^it to operating conditions (See Figure 1, and Charts 1, 3» 5, and 7). 

It should be emphasized at this point that the plating baths used in the through 
hole process must be carefully prepared following the make up instructions com¬ 
pletely. This is particularly true in preparing the electroless copper and 
electroless nickel baths. In the electrolytic oopper and electrolytic gold plating 
baths the geometry of the setup is critical and depends upon the design of the circuit 
being plated. The entire plating process must be rigidly controlled. This rigid con¬ 
trol is necessary because variation in the plating thickness could prevent optimum 
component insertion. With this rigid control, the plating thickness will be dupli¬ 
cated from circuit to circuit. 

From the initial to the final step in the boards fabrication process, cleanliness 
was iimiensely important. The cut and drilled double sided oopper boards were thoroughly 
scrubbed by hand using a scrub cleaner and were rinsed in running tap water to insure 
removal of any residue from the laminating process or subsequent handling. It must be 
noted that it is very important that the copper circuit side of the board be free from 
fingeiprints, oils, or other agents that may reduce the adhesion of the plated coat. 

This is particularly true in the drilled hole where any contamination may make it 
difficult to bond the electroless oopper to the hole walls. An indication that the 
oopper laminated surface has been properly cleaned is its ability to maintain an un¬ 
broken film of water over the entire cleaned surface. 

, The scrub cleaning operation was followed by depositing electroless copper 
on the plastic hole walls (See Chart 2 and Figure 2). All of the boards regard¬ 
less of hole size were immersed in the electroless Conner bath for a period of 
twenty-five (25) minutes. This immersion period theoretically gave a build-up 
of approximately .000020 inches. 

The electroless deposition was immediately followed by a electrolytic copper 
plating process (See Chart U and Figure 3) to increase the thickness and strengthen 
the electroless copper deposit in the holes. For plating thickness and time (See 
Chart 9). The oopper plated board was then air dried and the holes were visually 
inspected to detect any obvious defects. 


2 



I 


The electroless nickel nrocess was applied to the board (See Chart 6). Each 
board was immersed in the nickel solution for twenty-five (25) minutes which theo¬ 
retically gave a build-up of approximately 0,0002 inches. The nickel process is 
followed by the application of the circuit pattern by the utilization of the silk 
screen method (See Figure ii). The plated board was placed under the silk screen 
which had the desired circuit Dattem enmeshed upon it, and the black resist material 
(Meaker Co.) was applied by means of a squeegee and then the board was removed and 
placed into an oven for fifteen (15) minutes at 250°F for curing. 

The silk screening procedure was followed by the electrolytic gold plating 
process (See Figure 5 and Chart 8), The gold plating was accomplished by using 
a relatively small amount of current somewhere in the nature of 70 ndlliamperes 
per square inch which theoretically yielded a plating thickness of 0.0001" for 
15 minutes of plating (See Chart 10.) The black resist material was then removed 
by soaking the boards into a solution of trichlorethylene for approximately two 
minutes. The boards were rinsed and air dried and were placed in a spray etching 
machine where the unwanted metal was etched away with a Ferric Chloride solution 
in two minutes, thus leaving the gold plated circuit pattern. The ten holes in 
each board were then checked with an ohmraeter for continuity and reoorded (See 
Figure 6). 

From previous experience in this field a few pertinent facts had been accum¬ 
ulated -Which proved very useful in the current project. Probably the most important 
knowledge gained was that the initial drilling, deburring, and cleaning operations 
must be stringently controlled and that so-called short-cuts must be avoided. Strict 
attention to these initial details proved that the preparation of the surface of the 
circuit board was probably more important than the actual plating operations, although 
it is not intended here to minimize the importance of the latter processes* It was 
observed that the adhesion of the initial electroless oopper film on the non-condue- 
tive substrate was the prime factor in producing high quality orinted circuit boards. 
To achieve this adhesion the drilled hole must be properly deburred, otherwise the 
copper deposit will build-up at the sharp ragged edges and form what is commonly 
called treed deposits which results in very little adherence* 

The objective of the work reported herein was to determine the feasibilities 
and the problems encountered in plating small (O.OljO", 0.031", 0.020" and 0.016") 
diameter through holes in double sided printed circuit boards utilizing copper, 
nickel and gold films with particular emphasis upon the minimal plating times. 


RESULTS AND DISCISSION 


The results of the four tests indicate a successful approach and optimum tech¬ 
niques utilized in plating small diameter holes of printed circuit boards. The results 
substaniate knowledge gained in previous experiments using larger sized holes, namely, 
that the drilling, deburring, and cleaning procedures are extremely important and that 
any short-cuts should be avoided. 


3 



The electrolytic plating tines for both oopper (b5 minutes) and gold (15 minutes) 
used on the first twenty (20; boards in Test No. 1 were chosen as the ideal plating 
times, therefore, they were considered to present the least amount of difficulties 
which the actual plating later verified. The plating times of the remaining forty 
( bO ) boards were decreased in an effort to obtain minimal requirements and the re¬ 
sults indicated that regardless of the plating times the circuit boards were all 
successfully plated. 

The following two tests were conducted with the same approach in mind as the 
first test and the results obtained were essentially the same. It was determined 
that the plating times of the initial twenty (20) boards in the second test should 
be reduced to 23 minutes for the copper plating and 8 minutes for ttie gold plating. 
These twenty (20) boards were all successfully platedj consequently, the remaining 
forty (bO) boards were plated with a reduction in the plating time and they also 
were evaluated as being successful. 

The results of Test No. h were slightly different from the results of the three 
previous tests. Although the first forty (bo) boards were successfully plated, all 
of the last twenty (20) boards were not. There were two hundred (200) holes to be 
plated in the last twenty (20) boards and one hundred and seventy (170) holes were 
successfully plated which is 85 oer cent of the holes, but approaching the problem 
from the more realistic angle, there were only twelve (12) boards of the twenty (20) 
which were designated satisfactory, which of course, is only 60 per cent. The results 
of these last twenty (20) boards are not to be considered disappointing, when one con¬ 
siders the plating times used; four (b) minutes for copper plating and two (2) minutes 
for gold plating. These short plating times would rarely if ever be used in the prac¬ 
tical application of producing printed circuits. 


CONCLUSIONS 


It was determined to be feasible to gold plate through anall diametered holes 
(O.ObO", 0.031", 0.020", and 0.016") of double sided printed circuit boards. 

There were no problems encountered in the plating of printed circuit boards 
having (O.ObO", 0.031*, and 0.020") diameter holes. 

Successful gold plated through holes were and can be achieved on printed circuit 
boards having 0.016" holes using eight (8) and six (6) minutes copper plating times 
and four (b) minutes gold plating times. 

Printed circuit boards with plated through holes having 0.016" diameter were 
successfully accomplished for sixty (60) per cent of the boards using plating times 
of four (b) minutes for copper and two (2) minutes gold. These plating times are un¬ 
realistic in practice and would rarely be used. 


b 



Figure 1. Making up Plating Bathe 

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6 







Figure 4. Applying Circuit Pattern Using a Silk Screen 

: : . v i. ft 1 ft k b V K U • 5 :> ••> •* 

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8 



Figure 5. Gold Plating Arrangement 







I 



10 


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CHART ONE 


Electroless Copper Bath Make-Up 
(Shipley Process) 


1* Al-Chelate 

1 part concentrate, 15 parts water. 

2. Cupric Chloride 

Dissolve 3A lb. cupric chloride In 2 gals, water, then add 1 gal. 

3. Hydrochloric Acid 

3358 Muriatic Acid 

Add 1 part Muriatic acid to 2 parts water, 
lu Reagent H Cl 

Add 1 part reagent grade hydrochloric acid to 2 parts distilled water. 
(Do not use muriatic acid) 

3. Catalyst 6F 

Use as supplied. Do not dilute. 

6. Accelerator 6F 

1 part concentrate, 1 part water. 

7. Copper Mix #3 

In diluting the copper concentrate the water temperature should be the 
same as the room temperature. 

6$°f dilution * 1 part #34, $ parts water, 1 part #3B 
70°F dilution S 1 part #3A» 6 parts water, 1 part #3B 

75°F dilution 2 l part #34, 7 parts water, 1 part #3B 
80 oF dilution « 1 part #3A, 8 parts water, 1 part #3B 


12 



CHART TWO 


Electroless Copper Plating Procedure 

1 . Scrub board clean with Shipley Scrub Cleaner #11* 

2. Water Rinse* 

3* Al-Chelate clean for three (3) minutes at 180°F. 

U. Water Rinse* 

5. Cupric Chloride immersion for three (3) minutes, 

6 * Water Rinse* 

7 * Hydrodiloric acid dip for one ( 1 ) minute, 

8 . Water Rinse. 

9. Reagent Hydrodiloric acid dip for three ( 3 ) minutes, 

10, Catalyst iimersion for five (5) minutes* 

11* Water Rinse* 

12* Another Water Rinse* 

13* Accelerator immersion for five (5) minutes* Can remain in this solution 
up to sixty minutes without any deleterious effects* 

llu Water Rinse* 

15. Electroless Copper Mix immersion for twenty-five (25) minutes. 

16* Water Rinse* 


13 



CHART THREE 


Electrolytic Copper Bath Make-Up 


Solution Composition* 
Copper Sulphate 
Sulphuric Acid 


209.2 gms per liter (28 os. per gal.) 
52.3 gms per liter ( 7 os. per gal.) 


Operating Conditions* 
Temperature 
Voltage 

Current Density 


72°F (Room) 

1 to U Volts 

175 milliamps per sq. in. (25 amps per sq. ft.) 


CHART TOUR 

Electrolytic Copper Plating Procedure 

1. Al-Chelate clean for one (1) minute at 180°F. 

2. Water Rinse. 

3. Immerse in 3# Hydrochloric acid for approximately fifteen (15) seconds, 
lu Water Rinse. 

5* Enter Electrolytic Copper Bath with current on for immediate plating. 

6 . Water Rinse. 

7. Air Dry. 


U* 



CHART JIVE 


Electroless Nickel Bath Make-Up 
(Enthone Process) 


1. Dilute one part of Ehplate Ni-hlOA with 63- parts of distilled water by 
volume. 

2. Adjust the of this solution to li.0-lj.3 (Electrometric) by adding a 
sodium hydroxide solution containing 0.11 to 0.2? gms./ml of C.P. sodium 
hydroxide* 

3. Then add ■§■ part by volume of Enplate Ni-ltf.0B and again adjust the PH to U.3. 


Operating Conditions! 
Temperature 
FH 

Plating Rate 


160° - 163>°F 
h.3 

0.3 - O.U mils/hr. 


Activator Bath Make-Up 
(Enthone Process) 

^ pint of Activator to one gallon of water* 


CHART SIX 

Electroless Nickel Plating Procedure 

1* Alkaline Clean for two (2) minutes at 180°F, 

2. Water Rinse. 

3. Hydrochloric Acid dip for one (l) minute. 

)i. Water Rinse* 

3. Activator immersion for thirty (30) seoonds. 

6. Water Rinse* 

7. Electroless Nickel Solution for twenty-five (23) minutes at 163°F. 

8. Water Rinse. 

•k 

9. Air Diy, 


IS 



CHART SEVEN 


Electrolytic Gold Bath Make-Dp 
(Sel-Rex Process) 


Autronex electroplating solutions are shipped ready for use* 


Operating Conditions* 

Metallic Gold Content 
Cathode Current Density 
PH 

Specific Density 
Anodes 
Temperature 
Agitation 


8.2 grams/liter 

70 ma/sq. in (Dp to 12 amps/sq. ft.) 

3*2- 4.0 electro-metric 

8.Oo to 12*0° Baume 

Platinum 

110°F 

Vigorously by Air 


CHART EIGHT 

Electrolytic Gold Plating Procedure 

1. Dip in Arononium Persulphate (25/S by weight) for approximately fifteen 
(15) seconds* 

2. Water Rinse* 

3» Dip in HCL (33/S by weight) for approximately fifteen ( 15 ) seconds. 

It. Water Rinse. 

5 . Enter electrolytic gold plating bath with current on for immediate plating, 

6. Water Rinse. 

7. Air Dry. 


16 




(S3 HONI) SS3NX3IHJL 

17 


.0002 












CHART TEN 

ELECTROLYTIC ACIO GOLD PLATING 70MA/SQ. IN. (IOASF) 


i 



TIME (MINUTES) 




TABLE I 

GOLD PIATEU HOLES TEST NO. 1 (O.OljO'* TSIAMETER) 


NOTEt Electroless copper plating and electroless nickel plating were each 
accomplished in 25 minutes* 


Board 

No. 

Electro¬ 
lytic Cop¬ 
per Plating 
Time (min.) 

Electro¬ 
lytic Gold 
Plating 

Time (min.) 

Ten 

Plated 

Thru- 

Holes (Con¬ 
tinuity) 

Board 

No. 

Electro¬ 
lytic Cop¬ 
per Plating 
Time (min.) 

Electro¬ 
lytic Gold 
Plating 

Time (min.) 

Ten 

Plated 
Thru- 
Holes (Con 
tinuity) 

1 

15 

15 

Tes 

31 

23 

8 

Yes 

2 

15 

15 

Yes 

32 

23 

8 

Yes 

3 

15 

15 

Yes 

33 

23 

8 

Yes 

h 

15 

15 

Yes 

3li 

23 

8 

Yes 

5 

15 

15 

Yes 

35 

23 

8 

Yes 

6 

15 

15 

Yes 

36 

23 

8 

Yes 

7 

15 

15 

Yes 

37 

23 

8 

Yes 

8 

15 

15 

Yes 

38 

23 

8 

Yes 

9 

15 

15 

Yes 

39 

23 

8 

Yes 

10 

15 

15 

Yes 

Uo 

23 

8 

Yes 

11 

15 

15 

Yes 





12 

15 

15 

Yes 

la 

12 

6 

Yes 

13 

15 

15 

Yes 

b2 

12 

6 

Yes 

111 

15 

15 

Yes 

U3 

12 

6 

Yes 

15 

15 

15 

Yes 

uu 

12 

6 

Yes 

16 

15 

15 

Yes 

15 

12 

6 

Yes 

17 

15 

15 

Yes 

15 

12 

6 

Yes 

18 

15 

15 

Yes 

U7 

12 

6 

Yes 

19 

15 

15 

Yes 

15 

12 

6 

Yes 

20 

15 

35 

Yes 

U9 

12 

6 

Yes 





50 

12 

6 

Yes 

21 

23 

8 

Yes 

51 

12 

6 

Yes 

22 

23 

8 

Yes 

52 

12 

6 

Yes 

23 

23 

8 

Yes 

53 

12 

6 

Yes 

2h 

23 

8 

Yes 

5)i 

12 

6 

Yes 

25 

23 

8 

Yes 

55 

12 

6 

Yes 

26 

23 

8 

Yes 

56 

12 

6 

Yes 

27 

23 

8 

Yes 

57 

12 

6 

Yes 

28 

23 

8 

Yes 

58 

12 

6 

Yes 

29 

23 

8 

Yes 

59 

12 

6 

Yes 

30 

23 

8 

Yes 

60 

12 

6 

Yes 


19 


t 


TABLE II 

GOLD PLATED HO IBS TEST NO. 2 (0.031" DTAMETEE) 


NOTE: Electroless oonper plating and electroless nickel plating were each accomplished 
in 25 minutes. 


Board 

No. 

Electro¬ 
lytic Cop¬ 
per Plating 
Time (min.) 

Electro¬ 
lytic Gold 
Plating 

Time (min.) 

Tati 

Plated 

Thru- 
Holes (Con¬ 
tinuity) 

Board 

No. 

Electro¬ 
lytic Cop¬ 
per Plating 
Time (min.) 

Electro¬ 
lytic (Sold 
Plating Time 
(min.) 

Ten 

Plated 

Thru- 

Holes (Con¬ 
tinuity) 

1 

23 

8 

Tes 

31 

12 

6 

Yes 

2 

23 

8 

Yes 

32 

12 

6 

Yes 

3 

23 

8 

Yes 

33 

12 

6 

Yes 

li 

23 

8 

Yes 

3h 

12 

6 

Yes 

5 

23 

8 

Yes 

35 

12 

6 

Yes 

6 

23 

8 

Yes 

36 

12 

6 

Yes 

7 

23 

8 

Yes 

37 

12 

6 

Yes 

8 

23 

8 

Yes 

35 

12 

6 

Yes 

9 

23 

8 

Yes 

39 

12 

6 

Yes 

10 

23 

8 

Yes 


12 

6 

Yes 

11 

23 

8 

Yes 





12 

23 

8 

Yes 

ia 

8 

U 

Yes 

13 

23 

8 

Yes 

\i2 

8 

h 

Yes 

m 

23 

8 

Yes 

U3 

8 

h 

Yes 

15 

23 

8 

Yes 

Ui 

8 

h 

Yes 

16 

23 

8 

Yes 

h$ 

8 

h 

Yes 

17 

23 

8 

Yes 

b6 

8 

h 

Yes 

18 

23 

8 

Yes 

hi 

8 

h 

Yes 

19 

23 

8 

Yes 

W 

8 

h 

Yes 

20 

23 

8 

Yes 

U9 

8 

h 

Yes 





50 

8 

h 

Yes 

21 

12 

6 

Yes 

5i 

8 

U 

Yes 

22 

12 

6 

Yes 

52 

8 

h 

Yes 

23 

12 

6 

Yes 

53 

8 

h 

Yes 

2 U 

12 

6 

Yes 

5U 

8 

h 

Yes 

25 

12 

6 

Yes 

55 

8 

h 

Yes 

26 

12 

6 

Yes 

56 

8 

h 

Yes 

,27 

12 

6 

Yes 

57 

8 

h 

Yes 

28 

12 

6 

Yes 

58 

8 

h 

Yes 

29 

12 

6 

Yes 

59 

8 

h 

Yes 

30 

12 

6 

Yes 

60 

8 

h 

Yes 


20 


I 


TABLE III 

GOLD PIATED HOLES TEST NO. 3 ( 0 , 020 " DIAMETER) 

NOTE: Electroless oooper and electroless nickel plating were each accomplished 

in 25 minutes. 


Board 

No. 

Electro¬ 
lytic Cop¬ 
per Plating 
Time (min.) 

Electro¬ 
lytic Gold 
Plating 

Time (min.) 

Ten 

Plated 

Thru- 

Holes (Con¬ 
tinuity) 

Board 

No, 

Electro- 
lytic Cop¬ 
per Plating 
Time (min,) 

Electro¬ 
lytic Gold 
Plating Time 
(min.) 

Ten 

Plated 

Thru- 

Holes (Con- 
tinuity) 

1 

12 

6 

Yes 

31 

8 

h 

Yes 

2 

12 

6 

Yes 

32 

8 

h 

Yes 

3 

12 

6 

Yes 

33 

8 

a 

Yes 

1* 

12 

6 

Yes 

3 h 

8 

a 

Yes 

5 

12 

6 

Yes 

35 

8 

h 

Yes 

6 

12 

6 

Yes 

36 

8 

u 

Yes 

7 

12 

6 

Yes 

37 

8 

u 

Yes 

P 

12 

6 

Yes 

38 

8 

h 

Yes 

9 

12 

6 

Yes 

39 

8 

h 

Yes 

10 

12 

6 

Yes 

hO 

8 

h 

Yes 

11 

12 

6 

Yes 





12 

12 

6 

Yes 

la 

6 

h 

Yes 

13 

12 

6 

Yes 

U2 

6 

u 

Yes 

1U 

12 

6 

Yes 

U 3 

6 

u 

Yes 

35 

12 

6 

Yes 

bh 

6 

u 

Yes 

16 

12 

6 

Yes 

li 5 

6 

u 

Yes 

17 

12 

6 

Yes 

US 

6 

h 

Yes 

IP 

12 

6 

Yes 

hi 

6 

u 

Yes 

19 

12 

6 

Yes 

1|8 

6 

h 

Yes 

20 

12 

6 

Yes 

U 9 

6 

u 

Yes 





50 

6 

u 

Yes 

21 

8 

U 

Yes 

51 

6 

h 

Yes 

22 

8 

U 

Yes 

52 

6 

u 

Yes 

23 

8 

k 

Yes 

53 

6 

u 

Yes 

2 h 

8 

h 

Yes 

5 li 

6 

h 

Yes 

25 

8 

h 

Yes 

55 

6 

h 

Yes 

26 

8 

k 

Yes 

56 

6 

h 

Yes 

27 

8 

h 

Yes 

57 

6 

u 

Yes 

28 

8 

h 

Yes 

58 

6 

h 

Yes 

29 

8 

h 

Yes 

59 

6 

u 

Yes 

30 

8 

h 

Yes 

60 

6 

u 

Yes 


21 


TABLE IV 


I; 

I 


GOLD PIATED HOLES TEST NO. It ( 0 . 016 " DIAMETER) 


NOTE* Electroless copper plating and electroless nickel plating were each accomplished 
in 25 minutes* 


Board 

No. 

Electro¬ 
lytic Cop¬ 
per Plating 
Time (min.) 

Electro¬ 
lytic Gold 
Plating 

Time (min.) 

Ten 

Plated 

Thru- 

Holes (Con¬ 
tinuity) 

Board 

No. 

Electro¬ 
lytic Cop¬ 
per Plating 
Time (min.) 

Electro¬ 
lytic Gold 
Plating 

Time (min.) 

Ten 

Plated 

Thru- 

Holes (Con¬ 
tinuity) 

1 

8 

4 

Tes 

31 

6 

4 

Yes 

2 

8 

4 

Yes 

32 

6 

4 

Yes 

3 

8 

It 

Yes 

33 

6 

4 

Yes 

4 

8 

It 

Yes 

34 

6 

4 

Yes 

3 

8 

It 

Yes 

35 

6 

4 

Yes 

6 

8 

It 

Yes 

36 

6 

4 

Yes 

7 

8 

It 

Yes 

37 

6 

4 

Yes 

8 

8 

It 

Yes 

38 

6 

4 

Yes 

9 

8 

It 

Yes 

39 

6 

4 

Yes 

10 

8 

It 

Yes 

40 

6 

4 

Yes 

11 

8 

It 

Yes 





12 

8 

It 

Yes 

41 

4 

2 

Yes 

13 

8 

It 

Yes 

42 

4 

2 

Y68 

m 

8 

It 

Yes 

43 

4 

2 

No, cnly 7 

15 

8 

It 

Yes 

44 

4 

2 

Yes 

36 

8 

It 

Yes 

45 

4 

2 

No, only 8 

17 

8 

It 

Yes 

46 

4 

2 

Yes 

18 

8 

U 

Yes 

47 

4 

2 

No,aiLy 5 

19 

8 

It 

Yes 

48 

4 

2 

Yes 

20 

8 

4 

Yes 

49 

4 

2 

Yes 





5 o 

4 

2 

No,en 3 y 6 

21 

6 

b 

Yes 

51 

4 

2 

Yes 

22 

6 

b 

Yes 

52 

4 

2 

Yes 

23 

6 

b 

Yes 

53 

4 

2 

No, ally 6 

2lt 

6 

b 

Yes 

54 

4 

2 

Yes 

25 

6 

b 

Yes 

55 

4 

2 

Yes 

26 

6 

b 

Yes 

56 

4 

2 

No,otily 7 

27 

6 

b 

Yes 

57 

4 

2 

Yes 

28 

6 

It 

Yes 

58 

4 

2 

No, anly 5 

29 

6 

b 

Yes 

59 

4 

2 

No, only 6 

30 

6 

b 

Yes 

60 

4 

2 

Yes 


22 


BIBIIOORAIHY 


1. Alzua, B., Materials. Methods and Reliability on Printed Wiring Boards, 

Motorola Inc., Phoenix, Arizona, October lh, 19^8". 

2. Heuring, Harvey, A Reliable Process for Plating Gold on Printed Circuits , 
Products finishing, April 1962. 

3. Prise, Walter J., Printed-Circuit Boards: A Guide to Fabricating Techniques , 
Electronic Design, November 22, 1961. 

I*. Itode, John J., Printed-Circuit Techniques-Eyeletting vs. Plating, Electronic 
Equipment Ehgineering, June 195^. 

5. Rothschild, B.F., Trouble Shooting Chart for Printed Circuit Plating Processes , 

Plating, December 1962. ~™’ 

6. Shapiro, Harold, Printed Circuits and the Electro-Plating Industry , Plating, 
June 1957. 

7. Van Deusen, Werter P., Production of Printed Circuits , Plating, February 1959. 

8. Warshauer, Bernard, Eliminating the Gold Plating Process in Printed Circuit 
Boards, Metal Finishing, July 1961. 



DISTRIBUTION* 


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