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UniPak 2 ™ 

981-0001-001 REV A SEPT 84 

Copyright © Data I/O Corporation, 1984. All rights reserved. 



Data I/O has made every attempt to ensure that the information in this document is accurate and complete. However 
Data I/O assumes no liability for errors, or for any damages that result from use of this document or the equipment which it 
accompanies. 

Data I/O reserves the right to make changes to this document without notice at any time. 

NOTE 
Before using the UniPak 2™, read section 1.2 for programmer mainframe compatibility information. 



Applies to: Engineering Part Number 950-0059-006 

Text Part Number 090-0065-001 



TABLE OF CONTENTS 



SECTION 1. INTRODUCTION 

1.1 OVERVIEW • 1-1 

1.2 PROGRAMMER COMPATIBILITY 1-1 

1.3 APPLICATIONS 1-2 

1 .4 SPECIFICATIONS 1-2 

1.5 FIELD APPLICATION SUPPORT 1-2 

1.6 WARRANTY \. 1-2 

1 .7 SERVICE 1-2 

1 .8 ORDERING 1-2 

SECTION 2. INSTALLATION 

2.1 INSPECTION .2-1 

2.2 UniPak 2™ INSTALLATION 2-1 

2.3 UniPak 2™ REMOVAL 2-1 

2.4 REPACKING FOR SHIPMENT 2-1 

SECTION 3. OPERATION 

3.1 OVERVIEW 3-1 

3.2 POWER UP ■'■3-2 

3.3 POWER DOWN 3-2 

3.4 BASIC OPERATION 3-2 

3.4.1 Load RAM With Data From Master Device 3-3 

3.4.2 Verify RAM Data Against Master Device Data 3-3 

3.4.3 Program Device With RAM Data 3-3 

3.4.4 Extended Select Functions 3-4 

3.5 ELECTRONIC IDENTIFIERS 3-5 

3.6 FAMILY CODE AND PINOUT CODE SELECTION 3-5 

3.7 DEVICE INSERTION 3-5 

3.8 DEVICE REMOVAL 3-6 

SECTION 4. MAINTENANCE/TROUBLESHOOTING/CALIBRATION 

4.1 OVERVIEW 4-1 

4.2 MAINTENANCE 4-1 

4.2.1 UniPak 2™ Disassembly 4-1 

4.2.2 Cleaning 4-3 

4.2.3 Inspection 4-3 

4.2.4 UniPak 2™ Assembly 4-3 

4.3 TROUBLESHOOTING 4-4 

4.3.1 No System Operation 4-4 

4.3.2 Poor Yields 4-4 

4.3.3 UniPak 2™ Failure 4-4 

4.4 CALIBRATION 4-8 

4.4.1 DC Calibration 4-10 

4.4.2 Optional Verify-Voltage Checks 4-15 

4.4.3 Waveform Observation 4-15 

4.4.4 Detailed Explanation of the Timing Diagrams 4-16 



I 
981-0001 



SECTION 5. CIRCUIT DESCRIPTION 

5.1 OVERVIEW 5-1 

5.2 GENERAL ARCHITECTURE 5-1 

5.2.1 The Link Between the UniPak 2™ and the Programmer 5-1 

5.2.2 The Buses 5-1 

5.3 COMPONENT LAYOUT 5-1 

5.3.1 Motherboard 5-2 

5.3.2 Waveform Generator 5-2 

5.3.3 Address Card 5-4 

5.3.4 Socket Card 5-5 

5.3.5 Memory Card 5-6 

APPENDIX A 

FAMILY AND PINOUT CODES A-1 

ERROR CODES A-9 

APPENDIX B 

TIMING DIAGRAMS B-1 

APPENDIX C 

SCHEMATICS C-1 

30-702-1650 Memory Card 

30-701-1655 Address Card 

30-702-1659 Socket Card 

30-702-1661 Motherboard 

30-701-1690 Waveform Generator 



981-0001 



LIST OF FIGURES 



1-1 Example of a "Modification Status" Sticl<er 1-1 

2-1 UniPak 2tm Installation 2-2 

3-1 Typical 29A Programmer Operation 3-1 

3-2 Programmer Power Switch Location 3-2 

3-3 UniPak 2tm Sockets and Device Installation 3-6 

4-1 UniPak 2tm Disassembly 4-1 

4-2 Socketboard Interconnect Cable Disconnect 4-2 

4-3 Circuit Board Removal 4-2 

4-4 Memory Card Removal 4-2 

4-5 Calibration Setup 4-9 

4-6 Pin Numbers of Device Sockets 4-11 

4-7 Adjustment Locations 4-11 

4-8 Accessing Calibration Steps 27, 28, 29, 30, 31 (29A Universal Programmer) 4-12 

4-9 Accessing Calibration Steps 27, 28, 29, 30, 31 (System 19) 4-13 

4-10 Accessing Calibration Steps 27, 28, 29, 30, 31 (Model 100A) 4-14 

4-1 1 UniPak 2tm Scope Trigger Test Point 4-16 

4-12 Pin Names by Pinout Code Numbers 4-17 

4-13 Sample Timing Diagram 4-21 

5-1 Block Diagram, UniPak 2™ Electronics 5-1 

5-2 Principal Components 5-1 

5-3 Block Diagram, Motherboard 5-2 

5-4 Block Diagram, Waveform Generator 5-2 

5-5 Block Diagram, Address Card 5-4 

5-6 Block Diagram, Socket Card 5-5 

5-7 Block Diagram, Memory Card 5-6 



LIST OF TABLES 



1-1 Programmer Compatability 1-1 

4-1 Troubleshooting Chart 4-6 

4-2 Key Sequence to Access the Calibration Mode 4-10 

4-3 Key Sequence to Fill RAM With Data 4-15 

4-4 Measurement Chart 4-22 

5-1 Pin Functions, Device Bus (at J1 ) 5-3 

A-1 UniPak 2™ Family and Pinout Codes A-1 



III 
981-0001 



SECTION 1 

INTRODUCTION 



1.1 OVERVIEW 

Data l/O's UniPak 2™ reliably programs over 600 
popular MOS and bipolar devices. Values for programming 
variables, including pinouts, voltage levels and timing, are 
stored in firmware tables. When you choose the family and 
pinout codes for a particular device, the programmer uses 
information in these tables to assemble a specialized 
programming routine in scratch RAM. This method allows 
high-speed operation with minimum firmware overhead. 
The UniPak 2™ is designed to adapt to the programming 
requirements of many different devices. Pinout variations 
are handled by seven device sockets on the UniPak 2™ 
and, in some cases, by adapters which connect to socket 
1 or 2. Specially designed electronic switches allow 
programming of both bipolar and MOS devices. 

To maximize control speed during programming, the 
UniPak 2™ makes extensive use of addressable latches for 
control signals. For flexibility in waveform generation, 
digital-to-analog converters (DACs) control all major power 
supplies, with several rise and fall times selected by 
firmware. 

1.2 PROGRAMMER COMPATIBILITY 

To be compatible with the UniPak l''^, your 
programmer may require a hardware and/or firmware 
update, depending on the model, configuration, and age. 
The information that follows will help you determine 
whether your programmer requires updating. If you find 
that your programmer does require updating, contact your 
nearest Data I/O Service Center. 

• System 17— The System 17 must be converted into a 
System 19 with the latest firmware installed and latest 
hardware modifications. 

• System 19— Check to determine whether your 
System 19 contains a 702-1520 or 702-1980 controller 
board by performing the following steps: 

1. Remove the programming pak (section 2.3). 

2. Remove the metal shield (if any) shown in figure 2-1. 

3. Count the number of EPROM firmware sockets 
located just behind the pak interface connector. If 
there are four sockets, it is a 702-1520 board. If there 
are eight sockets, it is a 702-1980 board. 





MODIFICATION STATUS 






1 


2 


3 


4 


5 


6 


• 


















If your System 19 contains a 702-1520 controller 
board, check the modification status sticker (figure 1-1) on 
the bottom of the programmer. If the sticker is not there or 
if only "1" is marked off, your System 19 requires 
hardware and firmware updating; contact the nearest 
Data I/O Service Center. If "2" is marked, your System 19 
is compatible with the UniPak 2tm. If your System 19 
contains a 702-1980 controller board, it may require a 
firmware update. To display the configuration number of 
the firmware in your programmer, key in "SELECT- 
B2-START". If the configuration number displayed 
matches the number listed below, your firmware needs 
updating. 



Model 



Configuration iVumber 



• 990-1902 

• 990-1903 



3599 
CC8B 



29A Universal Programmer— To be compatible with the 
UniPak 2TM, the 29A programmers must have Rev C or 
later firmware. To determine the configuration of the 
firmware in your 29A, key in "SELECT-B2-START" and 
observe the display. If the hex number matches one 
listed in table 1-1, your firmware needs to be updated. 

29B Universal Programmer- The UniPak 2tm is 
compatible with Rev A or later software. 
100A Production Programmer— To be compatible with 
the UniPak 2™, the 100A programmers must have 
Rev E or later firmware. To determine the configuration 
of the firmware in your 100A, key in "SELECT-10" and 
observe the display. If the hex number displayed 
matches one listed in table 1-1, your firmware needs to 
be updated. 



Figure 1-1. Example of a "Modification Status" 
Sticker 



Table 1-1. 


Programmer 


Compatibility 






Configuration 


Model 


Rev 


Number 


29A 


A 


lECA 




B 


20A4 


29A (with 


A 


BB41 


computer 


B 


COOB 


remote 






control) 






100A 


A 


917F 




B 


9405 




C 


9DEE 




D 


9BED 



1-1 

981-0001 



1.3 APPLICATIONS 

Table A-1 (in appendix A) lists all the devices that could 
be programmed with the UniPak 2"''m when this manual was 
published. In many cases when a new device with industry- 
standard pinout is introduced within a manufacturer's 
family, the UniPak 2™ WILL NOT require a revision to 
program it. For some new applications, such as to 
accommodate a new device family, a firmware update of 
the UniPak 2tm may be required. The revision number is 
stamped after the part number (950-0059) along the 
underside of the top edge of the UniPak 2^^ socket 
assembly. 

1.4 SPECIFICATIOIMS 

The UniPak 2TM receives its power from the 
programmer mainframe. Programming waveforms are 
generated from raw programmer supplies using regulators 
controlled by the programmer's microprocessor. The 
controlling firmware is located on a circuit card within the 
UniPak 2™. 

The physical and environmental specifications are: 

• Altitude: Sea level to 3 km (10,000 ft.) 

• Dimensions: 20.9 x 17.0 x 10.5 cm (8.2 x 6.7 x 4.2 in.) 

• Humidity (operating): 90% maximum (noncondensing) 

• Humidity (storage): 95% maximum (noncondensing) 

• Temperature (operating): to 40°C (32 to 104°F) 

• Temperature (storage): -40 to 55 °C ( - 40 to 131 °F) 

• Weight: 1.38 kg (3 lb. 0.5 oz.) 

1.5 FIELD APPLICATIOIM SUPPORT 

Data I/O has field applications engineers (FAE's) 
throughout the world. They can provide additional 
information about interfacing Data I/O products with other 
equipment and answer questions about equipment. FAE's 
are located within the United States at the addresses listed 
in the back of this manual. For international applications 
support, contact your nearest Data I/O representative. 



1.6 WARRANTY 

Data I/O equipment is warranted against defects in 
materials and workmanship. The warranty period of one 
year, unless specified otherwise, begins when you receive 
the equipment. The warranty card inside the back cover of 
this manual explains the length and conditions of the 
warranty. For warranty service, contact your nearest 
Data I/O service center. 

1.7 SERVICE 

Data I/O maintains service centers throughout the 
world, each staffed with factory-trained technicians to 
provide prompt, quality service. This includes not only 
repairs, but also calibration of all Data I/O products. A list 
of all Data I/O service centers is located in the back of this 
manual. 

1.8 ORDERING 

To order equipment, contact your Data I/O sales 
representative. Orders must contain the following 
information: 

• Description of the equipment (see the latest Data I/O 
price list or contact your sales representative for 
equipment and part numbers) 

• Quantity of each item ordered 

• Shipping and billing address of firm, including ZIP code 

• Name of person ordering equipment 

• Purchase order number 

• Desired method of shipment 



1-2 
981-0001 



SECTION 2 
INSTALLATION 



2.1 INSPECTION 

Your UniPak 2™ was tested both electrically and 
mechanically before it was shipped, and was carefully 
packaged to prevent shipping damage. It should, therefore, 
arrive free of any defect, without marks or scratches, and 
in perfect operating condition. However, carefully inspect 
the instrument for any damage that may have occurred in 
transit. If you note any damage, file a claim with the 
carrier and notify Data I/O. 

2.2 UniPak 2™ INSTALLATION 

The UniPak 2TM may be installed and removed with 
the programmer's power on; this feature allows you to 
retain data in RAM during module changes. If the 
programmer power is turned on before the UniPak 2tm is 
installed, you will hear a beep until the UniPak 2tm is 
installed. 

NOTE 
Voltage transients can cause device 
damage. Tfius, be sure tiiat all sockets 
are empty when: 

• switching power on or off 

or 

• installing or removing the UniPak 2tm 

To install the UniPak 2tm, do the following: 

1. Slide the UniPak 2^^ into the opening in the 
programmer (figure 2-1). 

2. Tilt the UniPak 2tm up and gently push it back to hook 
the flange of the UniPak 2tm over the back edge of 
the programmer opening (figure 2-1, a). 



3. Lower the UniPak 2^^ into position as shown in 
figure 2-1, b. 

4. Press gently on the front edge of the UniPak 2™ to 
ensure a good connection (figure 2-1, c). 

2.3 UniPak 2™ REMOVAL 

1. Check to make sure the programmer is not in the 
process of an operation. If it is, wait until the 
operation is complete (the action symbol on the 
display disappears). 

2. Check to make sure a device is not in a socket. If one 
is in a socket, remove it as described in section 3.7. 

3. Tilt the UniPak 2™ up and gently remove it from the 
programmer. 

2.4 REPACKING FOR SHIPMENT 

If the UniPak 2™ is to be shipped to Data I/O for 
service or repair, attach a tag to it describing the work 
required and identifying the owner. In correspondence, 
identify the unit by part number, revision level, and name. 
If the original shipping container is to be used, place the 
UniPak 2tm in the container with the appropriate packing 
material and seal the container with strong tape. If another 
container is used, be sure that it is a heavy carton, 
wrapped with heavy paper or plastic; use appropriate 
packing material and seal well with strong tape. Mark the 
container "DELICATE INSTRUMENT" or "FRAGILE." 



2-1 
981 -(XWI 



FLANGE 



NOTE: Although the System 29A is shown 
here, the insertion procedure is the 
same for all systems. 




b) Lower the UniPak 2™ into position. 



c) Push down to lock UniPak 2™ into place 



Figure 2-1. UniPak 2tm Installation 



2-2 
981-0001 



SECTION 3 

OPERATION 



3.1 OVERVIEW 

The UniPak 2™ can be used in 29A, 29B, System 19, 
or 100A programmers of any configuration; see section 1.2 
for firmware revision levels required. The typical 
programming operation with a 29A programmer and a 
UniPak 2TM is illustrated in figure 3-1. As can be seen from 
this figure, the UniPak 2™ can obtain data from three 
sources (a master device, a serial port, or the keyboard). 
Because the serial port and keyboard operations are unique 
for each type of programmer, you will be referred to your 
29A, 29B, System 19, or 100A programmer manual for 
details on how to program using these mainframes. 

When using a master device as the data source to 
program a blank device, you must first instruct the 
programmer to copy the device data into programmer RAM 
(shown as COPY in figure 3-1 and described in section 3.4). 



Then enter the family code and pinout code as described in 
section 3.6. The data in the device will have been copied 
to the RAM of your 29A when you press START, as 
shown in figure 3-1 . You must then remove the master 
device and instruct the programmer to copy the 
information just stored in its RAM to a blank device. This 
completes the basic programming operation. 

The procedures to perform basic operations with your 
UniPak 2'''M are described in this section. You should follow 
these procedures to properly operate your UniPak 2TM. 
Wherever possible, key sequences have been included for 
using your UniPak 2tm with a 29A Universal Programmer 
with Rev C firmware (read section 1.2 carefully to 
determine your programmer's firmware revision level). Refer 
to your programmer manual for key sequences for the 
System 19, 29B, and 100A programmers. 





































f BEGIN 1 


















i 




t 






INSTALL 
UNIPAK 2 
(SECTION 2) 






PRESS, COPY 
HAM 
DEVICE 
START 

(SECTION 3.41 






i 






i 










TURN ON 
PROGRAMMER 
ISECTION 3 21 




^X^rrectX,. 

j^ FAMILY AND ^*S 
%,,^PINOUT ENTERED^ 


NO 


ENTER 

FAMILY AND 
PINOUT CODE 
(SECTION 3.5) 








i 






f - 












MASTER 
DEVICE 


^.^^^''^^S. KEYBOARD OR 
^,y^ DATA ^S,„^_^ SERIAL PORT 






INSERT 

BLANK DEVICE 
TO BE PROGRAMMED 

(SECTION 3 61 










^^l^ 












' 




• 


' 














PRESS COPY 

DEVICE 

RAM 

START 

(SECTION 3 4) 




SEE 

PROGRAMMER 

MANUAL 

(OPERATION SECTIONI 






PRESS 

START 

(THIS WILL START 

PROGRAM 

OPERATIONI 






■ 
















' 






ENTER FAMILY 
AND PINOUT 

CODES 
(SECTION 3 51 








REMOVE 

PROGRAMMED 

DEVICE 

(SECTION 3.7) 






\ 


1 


, 




' 






INSERT MASTER 
DEVICE IN 
SOCKET 

(SECTION 3 6) 




C^™ ) 










, 


' 








PRESS 
START 






i 






REMOVE MASTER 

DEVICE 

(SECTION 3 71 













































Figure 3-1. Typical 29A Programmer Operation 



3-1 
981-0001 



3.2 POWER UP 



3.3 POWER DOWN 



2. 
3. 



NOTE 
If the UniPak 2™ is not installed in the 
programmer before power is turned on, 
you will hear a beep until the UniPak 2™ 
is installed. 

When turned on, the programmer will 
perform an automatic self-test routine. 
When the self-test routine is complete, 
the programmer will signal its readiness. 

To turn the programmer on, do the following: 

Check to make sure a device is not in a socket. If a 
device is in a socket, lift up the lever (located on the 
upper left of the socket; see section 3.8), then gently 
lift the device out of the socket. 
Plug the AC power cord into the power outlet. 
Flip the power switch up to the "ON" position (see 
figure 3-2). 




POWER CORD 
CONNECTOR 




-OFF 
POWER SWITCH 



Figure 3-2. Programmer Power Switch Location 



CAUTION 
Do not turn the power off while the 
programmer is doing an operation or 
when a device is in a socket; voltage 
transients may damage the device. 

To turn the programmer power off, do the following 
procedure: 

1. Check to make sure that the programmer is not in the 
middle of an operation. If it is, wait until that 
operation is through. 

2. Check to make sure a device is not in a socket. If a 
device is in a socket, remove it as described in 
section 3.8. 

3. Flip the power switch down to the "OFF" position 
(figure 3-2). 

3.4 BASIC OPERATION 

All data transfer or verification operations take place 
between the programmer's internal RAM and the device or 
between the RAM and serial port in your programmer. 
Because the procedure to transfer data via a serial port 
varies from programmer to programmer, this manual 
describes only data transfer with the 29A. For other 
programmers, refer to your programmer operation manual. 

The basic data transfer operations that can be 
performed with the UniPak 2™ and the 29A Universal 
Programmer are: 

• Load RAM with data from a master device (described 
in section 3.4.1). 

• Verify RAM data against the device data (described in 
section 3.4.2). 

• Program a device with RAM data (described in 
section 3.4.3). 



3-2 

981-0001 



3.4.1 Load RAM With Data From Master Device 

To load the 29A RAM with data from a master device, 
follow the steps listed below. 

1 . Press COPY; 29A displays COPY DATA FROM 

2. Press DEVICE; 29A displays DEV a ADDR/SIZE TO 

NOTE 
The device is the source of data. 

3. Press RAM; 29A displays CO DEV > RAM /\ ADDR 

NOTE 
The RAM is the destination of the data 
from the master device. 

4. Press START; 29A displays FAM a 00 PIN 00 

5. Enter the family code and pinout code (see 
section 3.6). 

6. Insert the master device Into the UniPak 2™ (see 
section 3.7). 

7. Press START; 29A displays LOADING DEVICE /Z7 

LOAD DONE XXXX 

NOTE 
XXXX is the sumchecic of the device. 

8. Remove the master device from the UniPak 2™ (see 
section 3.8). 

During source destination operations (copy and verify), 
ADDR and SIZE appear in the 29A prompts. These 
correspond to starting address and block size, respectively. 
For more detail on these parameters, see your programmer 
operation manual. When reading a device, the UniPak 2™ 
applies a nominal Vcc level. To simulate loading on device 
outputs, each output is driven by a 1 .6 mA current source. 

3.4.2 Verify RAM Data Against Master Device Data 

The two-pass verify consists of comparing the device 
data to RAM data and is performed at two Vqc levels; 
these levels, plus the output-sink currents and the output- 
level-sense voltages, vary according to each manufacturer's 
requirements. 

To verify that data entered in the 29A RAM duplicate 
the master device data, follow these steps: 

1. Press VERIFY; 29A displays VERIFY DATA FROM 

2. Press DEVICE; 29A displays DEV a ADDR/SIZE TO 

NOTE 
The device is the source of data. 



3. Press RAM; 29A displays VE DEV > RAM a ADDR 

NOTE 
The RAI\/I is the destination of the data 
from the master device. 

4. Press START; 29A displays FAM 00 PIN 00 

5. Enter the family code and pinout code (see 
section 3.6). 

6. Insert the master device into the UniPak 2tm (see 
section 3.7). 

7. Press START; 29A displays VERIFY DEVICE ID 

VE DEV DONE XXXX 

NOTE 
XXXX is the sumchecl( of the device. 

8. Remove the master device from the UniPak 2™ (see 
section 3-8). 

3.4.3 Program Device With RAM Data 

When programming a device, the system performs 
illegal-bit tests and blank checks at nominal Vcc and with 
nominal output loading. 

To program a blank device with the data in the 29A 
RAM, follow these steps: 

1. Press COPY; 29A displays COPY DATA FROM 

2. Press RAM; 29A displays RAM a ADDR/SIZE TO 

3. Press DEVICE; 29A displays CO RAM > DEV a ADDR 

4. Press START; 29A displays FAM a 00 PIN 00 

5. Enter the family code and pinout code (see 
section 3-6). 

6. Insert the blank device into the UniPak 2™ (see 
section 3-7). 

7. Press START; 29A displays TEST DEVICE /Z7 

PROGRAM DEVICE/!/ 
VERIFY DEVICE/!/ 
PRG DONE 01 XXXX 

8. Remove the device from the UniPak 2™ (see 
section 3.8). 

NOTE 
XXXX represents the sumchecl< of the 
device. 



3-3 
981-0001 



3.4.4 Extended Select Functions 

In addition to the three basic source-destination 
functions (copy, verify and edit) and the select functions 
described in the Operation section of your programmer 
manual, the UniPak 2™ offers eight extended select 
functions (BC, BD, C3, CC, CD, CE, CF and EF). These 
functions are not required for normal operation of the 
UniPal< 2TM. 

Functions BC and BD are used to disable and enable 
the electronic identifier function for device families listed in 
section 3.5, with the exception of family FF. 

To disable the electronic identifier test (BC), follow the 
procedure below. 

1. Press SELECT; 29A displays SELECT CODE a 

2. Press BC START; 29A displays SELECT CODE ** 

To enable the electronic identifier test (BD), follow the 
procedure below. 

1. Press SELECT; 29A displays SELECT CODE a 
2 Press BD START; 29A displays SELECT CODE ** 

Function C3 gives access to options for specific 
family/pinout code combinations. If the UniPak 2™ is 
being used in a Model 19, this select code will work only 
from terminal remote. 

To enter the options, follow the procedure below. 

1. Press SELECT; 29A displays SELECT CODE a 

2. Press C3 START; 29A displays FXX PYY OPTIONS 

3. Press START; 29A displays "NAME OF FIRST 
OPTION" 

To select different options, press the REVIEW key. To 
execute an option, press START (in terminal remote, the 
RETURN key is used for the START key, and the space 
bar is used for the REVIEW key). If the option has 
subheadings under it, once the START key has been 
pressed, the REVIEW key can select the desired 
subheading. The START key is then pressed to execute 
the subheading. Once an option has been completely 
executed, an asterisk will be displayed after the option 
name. Complete execution may require doing a number of 
subheadings. Pressing the START key a second time after 
an option is completely executed will exit the options file, 
and the 29A will display OPTIONS DONE **. 

NOTE 
For the 8751H, the option "PROG 
SECTY ONL Y" will program the security 
fuse as soon as the option is selected 
and executed. 

Functions CC and CD are used in conjunction with 
electronic identifiers and may be used from the keyboard or 
from remote control. 



Function CC displays the family and pinout codes of 
the last algorithm moved to RAM, usually the algorithm for 
the last device programmed or read. This function helps 
determine the family and pinout codes used by the 
programmer when in the automatic electronic identifier 
mode. 

Function CD displays in hexadecimal 16 bytes of the 
device's electronic identifier. Byte identifies the 
manufacturer; byte 1 identifies the device. For information 
on the purpose of the remaining bytes, consult the device 
data sheets. 

To display the family and pinout codes of the last 
algorithm moved to RAM, follow the procedure below. 

1. Press SELECT; 29A displays SELECT CODE a 

2. Press CC START; 29 A displays XXYY ** 

NOTE 
XX represents the family code; YY repre- 
sents the pinout code. 

To display the electronic identifier, proceed as follows: 

1. Press SELECT; 29A displays SELECT CODE a 

2. Press CD START; 29A displays 0000 YY 

3. To display additional bytes of electronic identifier, 
press START; 29A displays GOOX YY. To back up 
through previously displayed identifiers, press REVIEW; 
29A displays OOOX YY 

NOTE 
OOOX represents the byte number of the 
identifier displayed (i.e., 0001 represents 
byte 1 of the electronic identifier which is 
the device code). YY represents the 
identifier byte In hexadecimal. 

Functions CE and CF are used to set the reject count 
(the number of programming pulses applied to a fuse or 
cell before it is rejected); CE sets the reject count back to 
the commercial specification (this is the default value) and 
CF sets the single-pulse reject count. This feature was 
accomplished in older UniPak™ models by adding 50 to 
the family code). 

To select the commercial (default) reject count (CE), 
follow the procedure below. 

1. Press SELECT; 29A displays SELECT CODE a 

2. Press CE START; 29A displays SELECT CODE ** 

To select the single-pulse reject count (CF), take the 
following steps: 

1. Press SELECT; 29A displays SELECT CODE a 

2. Press CF START; 29A displays SELECT CODE ** 



3-4 
981-0001 



Function EF calls up a four-digit hexadecimal 
configuration number and a two-digit decimal version 
number that correspond to the revision level and version 
number of the UniPak 2™ firmware. This function can be 
useful to identify firmware revision levels when 
communicating with Data I/O regarding field bulletins and 
updates. 

To display the UniPak 2tm firmware configuration and 
version number, do the following: 

1 . Press SELECT; 29A displays SELECT CODE a 

2. Press EF START; 29A displays XXXX YY 

NOTE 
XXXX represents the UniPak 2rM 
firmware configuration number, and YY 
represents the version number. 



3.5 ELECTRONIC IDENTIFIERS 

This version of the UniPak 2 tm can read and use 
electronic identifiers in two modes. 

The first mode occurs when family code 79, 93, 27, A5, 
BF, C5, AB, AF, CI, DD, or 45 is selected. The identifier Is 
read and used to prohibit programming a device using the 
wrong family and pinout codes. The new low Vpp devices 
are protected from the old high Vpp algorithms which 
might destroy them. Older devices without signatures are 
permitted to program. An error will occur if you attempt to 
program using the wrong family or pinout codes. 

The second mode is automatic. It is selected by 
entering family and pinout codes FF/FF. In this mode the 
operator need not look up any family or pinout codes; the 
electronic identifier is read and the correct algorithm is 
used for each device. An error will occur if you attempt to 
program on older devices without electronic identifiers or 
on newer devices whose identifiers are not yet supported. 

3.6 FAMILY CODE AND PINOUT CODE 
SELECTION 

Any device that can be programmed with the 
UniPak 2TM is specified by a unique combination of a two- 
digit family code and a two-digit pinout code (table A-1). 
Once the codes for a particular device are entered, the 
UniPak 2TM remains set up for any operation with that 
device until new codes are entered. 

Your programmer manual will tell you where in the key 
sequence the family and pinout codes should be entered. If 
invalid family and pinout codes are entered, a beep will 
sound as either START or ENTER is pressed, or Err 30 
(error 30) will be displayed and the operation will be 
aborted. 

To select the family and pinout codes, do the 
following procedure: 

1. Locate the manufacturer name and part number 
stamped on the device. 



2. Turn to table A-1, Family and Pinout Codes, in 
appendix A, and find the same manufacturer name. 

3. Then, in the first column (Device Part Number), find 
the number which corresponds to the part number 
stamped on the device. 

4. Move to columns two and three, entitled Family and 
Pinout Codes, to find the numbers on the same line as 
the particular device number. 

5. Enter these selected family and pinout code numbers. 

6. Press "START." 

NOTE 
An LED (light-emitting diode) will light 
under one of the sockets. 

Valid family and pinout codes must be in effect to use 
the System 19 DEVICE DATA key. When you press the 
DEVICE DATA key, either nominal, first-pass, or second- 
pass verify level is applied to the device. The level 
applied depends on the System 19's position in executing 
the selected mode. If the KEYED light is on, the nominal 
verify level is applied. 

3.7 DEVICE INSERTION 

Once you have chosen the appropriate family and 
pinout codes, the UniPak 2™ is ready to accept a device in 
the socket located above the lighted LED. 

NOTE 
In the automatic electronic identifier 
mode, no LED is lighted unless 
UniPak 2"^ is performing an operation 
on a device. An empty socket will always 
be unlighted. In this mode, disregard any 
reference to lighted LEDs; use the socket 
with the correct number of pins. 

A good electrical connection between the device and 
the socket is essential. To ensure a good connection, do 
the following: 

1. Check to make sure the programmer is not doing an 
operation. If it is, wait until the operation is complete. 

2. Lift up the lever on the upper left side of the socket 
above the lighted LED; see figure 3-3. (The lever will 
stay locked into the upright position.) 

3. Gently insert the device in the socket above the lighted 
LED. Make sure pin 1 of the device is aligned with pin 
1 of the socket, as shown in figure 3-3. 

4. Push the lever down to lock the device in the socket. 

Once the family and pinout codes have been entered, 
the UniPak 2^'^ is ready for device-related operations. The 
key sequence to load, program, and verify are described in 
the Operation section of your programmer manual. 



3-5 
981-0001 



3.8 DEVICE REMOVAL 

1 . Check to make sure the programmer is not doing an 
operation. If it is, wait until the operation is complete. 

2. Lift up the lever on the left side of the socket; see 
figure 3-3. (The lever will lock into the upright 
position.) 

3. Lift the device out of the socket; the LED will remain 
illuminated. 



PIN1 



UNLOCKED 




PIN1 




Figure 3-3. UniPakZ™ Sockets and Device Installation 



3-6 
981 0001 



SECTION 4 
MAINTENANCE/TROUBLESHOOTING/CALIBRATION 



4.1 OVERVIEW 

The support material in this section has been provided 
to help you keep your UniPak 2tm in good operating 
condition. General maintenance practices are discussed in 
section 4.2, while the basic troubleshooting steps are listed 
in section 4.3. For those UniPak 2™ users who prefer to 
do their own calibration, detailed procedures, including 
measurement charts and timing diagrams, are provided in 
section 4.4. 

4.2 MAINTENANCE 

Before the UniPak 2™ can be cleaned (section 4.2.2) 
and/or inspected (section 4.2.3), it must be disassembled 
as described below. 



4.2.1 UniPak 2™ Disassembly 

To disassemble the UniPak 2™, refer to figure 4-1 and 
follow the procedure outlined below. 

1 . Remove the UniPak 2™ from the programmer; see 
section 2.3 for details. 

2. Place the UniPak 2™ face down on a flat surface. 

3. Unscrew the captive fasteners (figure 4-1 a) until they 
hang loosely; the screws will not separate from their 
standoffs. 

4. Lift the card cage up slightly, then pull out (as shown in 
figure 4-1 b) to unlock the flanges. 



CAPTIVE 
FASTENERS 




FLANGE 



PERMANENTLY 

ATTACHED TO 

STANDOFF 

Figure 4-1 a) Unscrew captive fasteners. 



Figure 4-1 b) Lift card cage up and out. 



Figure 4-1. UniPak 2^" Disassembly 



4-1 
981-0001 



5. Lift the card cage up until you can see the socl<etboard 
interconnect cable and its connector (figure 4-2). 

6. Flip the extraction tabs out on each side of the 
connector (figure 4^2). 

7. Pull the cable out of the connector. 

8. Disconnect the ground wire from the socketboard (see 
figure 4-2). 

9. Flip the extraction tabs out on the top card (waveform 
generator card) and unplug the interconnect cable from 
its connector (figure 4-3). 

10. Flip the extraction tabs out on the top card (waveform 
generator card). 

11. Pull the waveform generator card out along the guides 
(figure 4-3). 

12. Repeat steps 9, 10, and 11 for the extraction tabs on 
the address card. 

13. Remove the two screws and the shield, and pull the 
memory card down to unplug it from the edge 
connector (as shown in figure 4-4). 



SOCKETBOARD 

INTERCONNECT 

CABLE 



EXTRACTION 
TAB 




GROUND 
WIRE 



FLANGES 



SOCKETBOARD 

INTERCONNECT 

CABLE CONNECTOR 



EXTRACTION TABS 




GUIDE STRIP 

(FOR THE WAVEFORM 

GENERATOR CARD) 



GUIDE STRIP 
(FOR THE 
ADDRESS CARD) 



SOCKETBOARD 

INTERCONNECT 

CABLE 



Figure 4-3. Circuit Board Removal 




I ^ iii j iiii ri''fTitiT» " *»'"'»>»iriP'i'''qy» m i»ii wiu> ii n i 11'^ 



EDGE \ 

CONNECTOR PULL 
DOWN 






MYLAR 
SHIELD 



MEMORY 
CARD 



Figure 4-4. Memory Card Removal 



Figure 4-2. Socketboard Interconnect Cable Disconnect 



4-2 
981-0001 



4.2.2 Ctoaning 

Inspect the UniPak 2™ inside and out for accumulated 
dirt or dust. To clean the UniPak 2™, follow the procedure 
below. 

1. Wipe any dust and/or dirt off the outside of the UniPak 
2TM with a clean, damp cloth. 

NOTE 
Do not use abrasive cleaners or 
so/vents. They will etch the paint. 

2. Remove dust from the circuit boards with a blast of dry, 
compressed air or a clean, soft-bristled brush. 

4.2.3 Inspection 

You can help prevent malfunctions by periodically 
inspecting your UniPak 2™. Check cable connections, card 
seating, mounting of socketed components, etc., for 
shorts, opens or unstable continuity. 

If you find heat-damaged components, be particularly 
careful to find and correct the cause of the overheating. 
This will prevent further damage. 



4.2.4 UniPak 2™ Assembly 

1 . Plug the memory card onto its edge connector, as 
shown in figure 4-4. 

2. Replace the shield, washers, and the two screws. 

3. Flip the two extraction tabs down on the address card. 

4. Using the flat surfaces of the extraction tabs, gently 
push the address card along the guides into its 
connector. 

5. Make sure the extraction tabs on the Interconnect cable 
connector are flipped open. 

6. Firmly, but gently, push the socketboard interconnect 
cable into the connector. Notice that the extraction tabs 
will move back to their locked positions when the cable 
is locked into the connector. 

7. Repeat steps 3 through 6 to replace the waveform 
generator card. 

8. Reconnect the ground wire to the socketboard. 
9 Plug the socketboard interconnect cable into its 

connector on the socketboard (figure 4-2). 

10. Replace the card cage by tilting it up to lock the 
flanges, as shown in figure 4-1, then gently setting it 
down. Make sure the captive fasteners line up with the 
fastener holes on the UniPak 2™ frame. 

1 1 . Tighten the captive fasteners finger tight. 



4-3 
981-0001 



4.3 TROUBLESHOOTING 

This section will help you interpret and isolate failures 
in the UniPak 2™. Use it in conjunction with section 5 
(Circuit Description) and the schematics provided in the 
back of this manual. 

There are three major classes of failures that can occur 
in a system comprised of a programmer and a UniPak 2""^. 
The first is no system operation, the second is poor yields, 
and the third is UniPak 2tm failure. 

After successfully troubleshooting the UniPak 2tm, you 
must calibrate it according to the instructions in 
section 4.4. It is very important that the programmer be 
calibrated before the UniPak 2tm is calibrated. 

4.3.1 No System Operation 

You should perform the following steps if the system 
will not initialize with the UniPak 2tm installed. After 
completing each step, determine whether the problem still 
exists. 

1. Check to be sure the UniPak 2™ is properly installed in 
your programmer. 

2. Check the UniPak 2tm programmer mating connector 
UD for bent or broken pins. (Pin HH is intentionally 
shorter.) 

3. Check the UniPak 2™ cards to be sure they are 
correctly installed in their connectors (section 4.2). 

4. Check the ribbon cable to be sure it is properly inserted 
in the connectors (section 4.2). 

5. Check the programmer power supplies for proper 
voltage output levels (see programmer manual). 

6. If steps 1 through 5 fail to isolate the problem, contact 
your local Data I/O Service Center. 

4.3.2 Poor Yields 

Perform the following steps if the yield rate begins to 
decrease. After completing each step, determine whether 
the problem still exists. 

1 . Do a complete calibration; be sure that the programmer 
has been calibrated first. 

2. Perform waveform observations (section 4.4) for the 
family of the device being programmed, being careful to 
note any discrepancies. You may find the circuit 
description (section 5) and the schematics at the end of 
this manual useful in isolating the problem. 



4. 



Perform calibration steps 27 and 28 on the measurement 
chart for the device family that is giving problems. The 
circuit description (section 5), schematics, and 
suspected components in tests 1 through 4 of table 4-1 
may be helpful in isolating the problem. 

If steps 1 through 3 fail to resolve the problem, contact 
your local Data I/O Service Center. 



4.3.3 UniPak 2™ Failure 

Perform the following steps if a device will not 
program at all or if error messages are displayed. After 
completing each step, determine whether the problem still 
exists. 

1. Check that the family and pinout codes are correct for 
the device, and that the device is being inserted in the 
correct socket. 

2. If possible, try a known-good device to determine 
whether there is a hardware problem. 

3. Check to be sure the UniPak 2tm is properly installed. 

4. Check the UniPak 2tm programmer mating (J1) 
connector for bent or broken pins. (Pin HH is 
intentionally shorter.) 

5. Check the UniPak 2tm cards to be sure they are 
correctly installed in their connectors (section 4.2). 

6. Check to be sure the ribbon cable is correctly oriented 
and properly inserted in the connectors. 

7. Perform a complete calibration, noting any 
measurements falling outside the indicated limits. Refer 
to the corresponding test number in table 4-1 for 
suspected boards and components, as well as the circuit 
description (section 5) and the schematics, to attempt 

to isolate the problem. 

8. Perform waveform observations and note any 
discrepancies. Referring to the circuit description and 
the schematics may be helpful in isolating the problem. 

9. If steps 1 through 8 fail to resolve the problem, contact 
your local Data I/O Service Center. 



4-4 
981-0001 





Table 4-1. 


Troubleshooting Chart 


TEST NUMBER 


SUSPECT CARDS 


SUSPECT COMPONENTS 


1 


701-1655 


VR1, U17, U25 


2 


701-1655 


VR1, U16, U25, 02, Q3 


3 


701-1655 


VR1, U16, U25, 02 


4 


701-1690 


U15, U7, U12, 021, R52, CR15, CR16, VR1, 015 




702-1659 


CR18, U10 


5 


701-1690 


U14, U7, U3, 03, R15, CR4, CR3, U10, U9, U11, 024, 025, 
019, CR14, 016, U18, U17, VR1, 015 




702-1659 


C5, R11, CR9 


6 


701-1690 


U13, U7, U6, 09, R31, CR10, CR11, 02, CR19, VR1, 015 




701-1655 


U23, R1, 015, 017, RP8, RP3, RP4, RP2, 04, U24, U11, 
CR6 


7 


702-1650 


U23, U22, VR2, CR3, 02, R28 




702-1659 


CR24, 01 0, U20 




701-1655 


U4, U14 


8 


701-1655 


VR1, U17, U25 


9 


701-1655 


VR1, U16, U25, 02 


10 


701-1655 


VR1, U17, U25 


11 


702-1650 


U17, 03, R3, VR1, U2, 01, CR1, CR2 




701-1655 


U23, R1, 015, 017, RP8, RP3, RP4, RP2, 04, CR6, U24, 
U11 


12 


702-1650 


U17, 03, R3, VR1, U2, 01, CR1, CR2, VR3, U5, U22, U11 




701-1655 


U23, R1, 015, 017, RP8, RP3, RP4, RP2, 04, U24, U11, 
CR6 


13 


701-1690 


U17, U18, U11, 022, 025, 02, CR19 




701-1655 


U23, R1, RP8, 016, RP3, 014, RP4, RP2, 012, U19, U24, 
CR9 


14 


701-1690 


U15, U7, U12, 021, U16 




702-1659 


CR18, U10 


15 


701-1690 


U16, U13, U7, U6, 09 


16 


701-1690 


U16, U14, U7, U3, 03 


17 


701-1655 


U26, U17, U25, VR1 


18 


701-1655 


U26, U16, U25, VR1, 02 


19 


702-1650 


U5, U22, U17, U11, 03, U2, CR1, CR2, 01 




701-1655 


U23, R1, RP8, 015, RP3, 017, RP4, RP2, 04, CR6, U11, 
U24 


20 


701-1690, 
701-1655, 
702-1659 




21 


702-1659 


U4, DS2 




701-1655 


U18 


22 


701-1690 


U15, U7, U12, 021, CR15, CR14, U16 




702-1659 


CR18, U10 


23 


702-1659 


CR26, 06, 07, 05 




701-1690 


U16, U13, U7, U6, 09, CR10, CR11 




702-1650 


U16, U3, U10, U12, U11, U7 


24 


701-1690 


U16, U14, U7, U3, 03, U9, U10, U11, 024, 025, 019, 
CR14, 016, CR4, CR3 




702-1659 


C5, R11 



4-5 
981-0001 



Table 4-1. Troubleshooting Chart (Continued) 



TEST NUMBER 


SUSPECT CARDS 


SUSPECT COMPONENTS 


25 


701-1690 


U16, U14, U7, U3, Q3, U9, U10, U11, Q24, Q25, U5, Q6, 
Q8, CR8, CR4, CR3 




702-1659 


C5, R11 


26 


701-1690 


U16, U14, U7, U3, Q3, U9, U10, U11, Q24, Q25, U5, Q13, 
CR9, Q4, Q10, Q12, Q5, Q7, CR4, CR3 




702-1659 


C5, R11 


27 


701-1690 


U16, U13, U7, U6, Q9, CR10, CR11, 02, CR19 




701-1655 


U23, R1, 016, RP3, 017, RP4, RP2, 08, CR9, U19, U24 


28 


701-1690 


U16, U13, U7, U6, 09, 02, 018, U17, Oil, CR2, 014, U5 


29 


701-1690 


U16, U15, U7, U12, 021, CR15, CR16 




702-1659 


CR18, U10 


30 


701-1690 


U16, U14, U7, U3, 03, CR4, CR3, U9, U10, U11, 024, 025, 
U5, 06, 08, CR8 




702-1659 


C5, R11 


31 


702-1650 


U23, U22, VR2, CR3, 02, R28 




702-1659 


CR24, 01 0, U20 




701-1655 


U4, U14 


32 


701-1690 


U18, U10, U5, U7, O20, 07, 05, 012, U9, CR9, 013, U11, 
024 




702-1659 


CR8, 05, R11 


33 


701-1690 


U11, CR17, VR2, U18, 019, 016, U9, 024, U10 




702-1659 


CR9, R11, C5 


34 


701-1690 


U16, U13, U7, U6, 09, GRIG, CR11 




702-1659 


CR4, CR3, CR2, U22, CR5, 01, CR32, CR31, CR28, 03, C13 




702-1650 


U5, VR3, U22, U17, U11, 03, U2, 01, CR1, CR2, VR1 




701-1655 


U19, U24, U23, R1, 016, RP3, 017, RP4, RP2, 08, CR9 


35 


702-1650 


U5, VR3, U22, U17, U11, 03, U2, 01, CR1, CR2, VR1 




701-1655 


U19, U24, U23, R1, 016, RP3, 017, RP4, RP2, 08, CR9 


36 


701-1690 


U16, U15, U7, U12, 021, CR15, CR16 




702-1659 


CRIB, U10 


37 


701-1690 


U16, U14, U7, U3, 03, CR4, CR3, U9, U10, U11, 024, 025, 
U5, 013, CR9, 07, 05, 012, 020, U7 




702-1659 


C5, R11 


38 


701-1690 


U16, U13, U7, U6, 09, CR10, CR11 




702-1659 


CR4, CR3, CR2, U22, CR5, 01, CR32, CR31, CR28, 03, 013 




702-1650 


U5, VR3, U22, U17, U11, 03, U2, 01, 0R1, 0R2, VR1 




701-1655 


U24, U11, U23, R1, RP8, 015, RP3, 017, RP4, RP2, 04, 
CR9 


39 


701-1690 


U16, U15, U7, U12, 021, CR15, 0R16 




702-1659 


0R18, U10 


40 


701-1655 


VR1, U16, U25, 02, RP5, U28, U22, 0R9, 0R6, U24, U11, 
U19, CR4, 0R7 




702-1659 


02, OR29, R30, 0R28, 0R31, CR32 


41 


701-1655 


VR1, U16, U25, 02, RP5, U28, U22, 0R9, U24, U11, U19, 
CR4 




702-1659 


02, CR29, R30, CR28, CR31, 0R32 


42 


701-1655 


VR1, U16, U25, 02, RP5, U28, U22, CR9, U24, U11, U19, 
0R4 




702-1659 


02, CR29, R30, 0R28, 0R31, 0R32 


43 


701-1655 


VRl, U16, U25, 02, RP5, U28, U22, CR9, CR6, U24, U11, 
U19, CR4, CR7 




702-1659 


02, CR29, R30, CR28, CR31, CR32 



4-6 
981-0001 



Table 4-1. Troubleshooting Chart (Continued) 



TEST NUMBER SUSPECT CARDS SUSPECT COMPONENTS 



44 702-1659 DS1, U4 
701-1655 U18 

45 701-1690 U16, U15, U7, U12, Q21, CR15, CR16 
702-1659 CR7, U10 

46 701-1655 U2, U3, U4, U14 
702-1650 U23, U22, VR2, CR3, 02 
702-1659 CR24, 010, U20, U21, U13 

47 701-1655 U2, U3, U4, U14 
702-1650 U23, U22, VR2, CR3, 02 
702-1659 CR24, O10, U20, U21, U13 

48 701-1655 U2, U3, U4, U14 
702-1650 U23, U22, VR2, CR3, 02 
702-1659 CR24, O10, U20, U21, U13 

49 701-1655 U2, U3, U4, U14 
702-1650 U23, U22, VR2, CR3, 02 
702-1659 CR24, O10, U20, U21, U13 

50 701-1655 04, 08, 012, 05, 014-17, U23 

51 701-1655 06, Oil, 09, 07, 014-017, U23 

52 701-1655 04, 08, 012, 05, 014-17, U23 

53 701-1655 06, Oil, 09, 07, 014-17, U23 

54 702-1659 DS3, U4 
701-1655 U18 

55 701-1690 U16, U15, U7, U12, 021, CR15, CR16 
702-1659 CR22, U10 

56 702-1659 DS4, U4 
701-1655 U18 

57 701-1690 U16, U15, U7, U12, 021, CR15, CR16 
702-1659 U10, CR1 

58 702-1659 DS5, U4 
701-1655 U18 

59 
60 
61 
62 
63 
64 
65 



66 



701-1690 


U16, U15, U7, U12, 021, CR15, CR16 






702-1659 


U10, CR11 






702-1659 


DS6, U4 






701-1655 


U18 






701-1690 


U16, U15, U7, U12, 021, CR15, CR16 






702-1659 


U10, CR19 






702-1659 


DS7, U4 






701-1655 


U18 






701-1690 


U16, U15, U7, U12, 021, CR15, CR16 






702-1659 


U10, CR23 






702-1659 


03, CR14, RP1, RIO, CR17, U10 






701-1655 


U18, U22 






701-1690 


U16, U15, U7, U12, 021, CR15, CR16 






701-165B 


VR1, U16, U17, U25, 02, 03, 01 






702-1659 


CR17, CR1, CR11, CR19, CR23, CR22, 


CR7, CR18, 


U10 


701-1690 


U16, U15, U7, U12, 021, CR15, CR16 






701-1655 


VR1, U16, U17, U25, 02, 03, 01 






702-1659 


CR17, CR1, CR11, CR19, CR23, CR22, 


CR7, CR18, 


U10 



4-7 
981-0001 



4.4 CALIBRATION 

The need for calibration varies witli the amount of use 
your UniPak 2tm receives. Generally, we suggest calibration 
whenever: 1 ) programming yields fall below the 
manufacturer's recommended minimums, or 2) 
troubleshooting has been completed, or 3) the user's 
company policy requires periodic calibration certification. 

NOTE 
If calibration or repair is required but you 
lack the facilities to accomplish it, 
contact the nearest Data I/O Service 
Center. 

Because of differences in programmer mainframes, this 
manual does not attempt to cover all areas of programmer 
calibration. Instead, it lists the steps necessary to calibrate 
only the UniPak 2™. 

Calibration of the UniPak 2™ consists of three parts: 

1. Power Supply Calibration— measures the DC supply 
voltages of the programmer. All other voltages depend 
on these supplies; therefore, this part of the calibration 
procedure must be done first. Refer to your 
programmer manual. 

2. DC Calibration — consists of measuring and adjusting 
critical DC voltage levels generated by the UniPak 2^^. 

3. Waveform Observation— enables observation of 
waveforms on an oscilloscope to ensure compliance 
with the device manufacturers' critical voltage and 
timing specifications. 

The first part of the calibration procedure (power 
supply calibration) varies with the type of programmer you 
have. Therefore, this manual refers you to your 
programmer manual for details on power supply calibration. 
DC calibration is discussed in section 4.4.1, the optional 
verify voltage checks are described in 4.4.2, and waveform 
observation is detailed in section 4.4.3. For information on 
how to carry out these steps on various programmers, 
consult your programmer manual. 



The following equipment is necessary to calibrate the 
UniPak 2tm: 

• Data I/O calibration extender (part number 910-1521) 

• Three and a half-digit digital voltmeter (DVM) 

• Dual-trace oscilloscope (Tektronix 465 or equivalent) 

Check the appropriate programmer manual for any 
additional equipment that you may need to calibrate the 
programmer. 

To prepare your UniPak 2tm for calibration, follow the 
procedures outlined below. 

1. Turn the programmer power off; see section 3.3 for 
details. 

2. Remove the UniPak 2tm from the programmer; see 
section 2.3 for details. 

3. Insert the calibration extender into the programmer the 
same way you insert the UniPak 2tm (section 2.2). 

4. Unscrew the two thumb screws (captive fasteners) 
located on the underside of the top cover of the 
UniPak 2tm (figure 4-1); they connect the card cage to 
the socket assembly. Separate the two parts of the 
assembly. 

CAUTION 
Do not let the fasteners short to the 
motherboard. 

5. Insert the 64-pin connector of the card cage into the 
mating connector on the calibration extender 
(figure 4-5, detail B). 

6. Lean the top portion of the UniPak 2tm against its 
bottom portion at a 45-degree angle; see figure 4-5. 

NOTE 
Be sure the socket assembly flange locks 
into the card cage flange (see figure 4-5, 
detail A). 

Do not allow the frame of the socket 
assembly to short to the memory board. 

Be careful not to strain the cable or 
scratch the top of the programmer. 



4-8 
981-0001 




Figure 4-5. Calibration Setup 



4-9 
981-0001 



4.4.1 DC Calibration 

The DC calibration procedure described in thiis section 
enables you to adjust critical DC voltage levels generated 
by the UniPak 2™. To follow this procedure, use the 
measurement chart at the end of this section. This 
measurement chart contains the information needed for all 
DC calibration tests. This information is included on the 
measurement chart in columns with the following headings: 

• Step No.— tells which step to use for each test. Step 
numbers are set at the programmer keyboard and 
reflected in the display. 

• Test No. — identifies individual tests. 

• Test Description— identifies the functions being tested. 

• Measurement Test Location— tells which socket pins, 
circuit boards, or test points to probe for measuring 
voltages. 

• Measurement— specifies allowable measurement ranges. 
If a reading falls outside the range and you cannot 
adjust it to within the range, do not use the UniPak 2tm 
until the problem is corrected. 

• Adjustment Location— tells which potentiometer to 
adjust if a measurement is out of range. 

• Comments— gives special instructions for particular 
tests. 

The DC calibration procedure is as follows: 

CAUTION 
Remove all devices from the sockets 
before entering the calibration mode 
(see section 3.8 for details). 
Waveform generation may damage 
any device In the UniPak 2^^ sockets. 

1. Turn the programmer power on (section 3.2). 

2. Put the programmer into the calibration mode by 
following the key sequences in table 4-2. 

3. Perform the general calibration steps (steps 1 through 
24) on the measurement chart. For steps 5, 6, and 7, 
refer to the figures at the end of the measurement 
chart to observe the bit switch rise waveform the DAC 
step waveforms, and the current DAC step waveform. 



Table 4-2. Key Sequence To Access the Calibration 
Mode 



Programmer Key Sequence To 


To 


To 


System 


Enter Calibration 


Increment 


Decrement 




Mode 


Step No. 


Step No. 


19 


Press SELECT 
Press C2 








Press ENTER 


Press 


Press 






ENTER 


REVIEW 




Enter Step Number* 








Press START 






29A/ 


Press SELECT 






29B 


Press CI 








Press START 


Press 


Press 






START 


REVIEW 




Enter Step Number* 








Press START 






100A 


Press SELECT 








Press 12 


Press 


Press 






START 


BACK- 
SPACE 




Enter Step Number* 








Press START 






*Optional 









For each general calibration step on the measurement 
chart do the following: 

• Take measurement readings at the device sockets or 
test points indicated on the measurement chart; 

figure 4-6 shows the pin numbers for the sockets; figure 
4-7 shows test points. 

• Ground the digital voltmeter to socket 7, pin 10 on the 
front panel of UniPak 2'''m. 

• The adjustment pots on the waveform generator, 
memory board, and the address card enable you to 
make adjustments when your measurements do not 
match the measurement chart; figure 4-7 shows the 
location of these adjustment points. 



4-10 
981-0001 



Access each new step by pressing the START (or 
ENTER) key. The new step number will appear in the 
display when the UniPak 2™ is ready for the next step. 
To go back to a previous test, press the REVIEW (or 
BACKSPACE) key. 

NOTE 
The remaining steps on the 
measurement chart (steps 25 through 28) 
are family specific. These steps are 
optional and have been included for your 
convenience. 

. For each fannily-specific calibration step on the 
measurement chart, do the following to enter the 
family and pinout codes: 

• Perform a load operation; refer to your 
programmer manual for details. 

• Enter the family and pinout codes when prompted 
by the programmer; refer to your programmer 
manual for further information. 

• Fill RAM with data specified on the timing diagram. 

• Put the programmer back into the calibration mode; 
see figures 4-8, 4-9, and 4-10 for the key sequence. 

• Enter the step number from the measurement chart. 

• Press START. 



14 



1 



28 



15 12 



24 



13 10 



20 



11 




9 8 



9 9 



10 10 



11 



Figure 4-6. Pin Numbers of Device Sockets 




TP3 



•TP4 



a) Waveform Generator, 701-1690 
TP1 TP3 



TP2' 




b) Address Card, 701-1655 




c) Memory Board, 702-1650 



Figure 4-7. Adjustment Locations 



4-11 
981-0001 



( BEGIN J 



PRESS -COPY ■ 



/ \ 

X COPY DATA 1 
V FROM I 



PRESS "RAM- 



RAM A ADDR/1 
SIZE TO I 



PRESS 'DEVICE" 



/ CO RAM > 1 

V DEV A ADDR J 



PRESS 'START- 



FAM 00 PIN 00 I 



<FAM XX \ 
PIN A YY I 




<Q 




> 




PRESS "M" 
'START" 


" 


C ''" ) 



PRESS ■SELECT- 



SELECT CODE 



/fill RAM a 00 I 



ENTER APPROPRIATE 

RAM DATA 

ISEE TIMING 

DIAGRAM) 



PRESS START ■ 



PRESS "SELECT- 



SELECT CODE< 




PRESS "29"? 
"START" 




i 


YES 


C '"' ) 






' 






PRESS "30" 
"START" 




t 




( "" ) 




F 


RESS " 
START 


1 


t 


( 


END 


) 



Figure 4-8. Accessing Calibration Steps 27, 28, 29, 30, 31 (29A Universal Programmer) 



4-12 
981-0001 




PRESS "27" 
"START" 


* 


c 


END 


) 





PRESS ■27 ■ 
"START" 




i 


( ""' ) 




' 




PRESS "28" 
"START" 




( ■"■) 






PRESS '»" 
"START" 



PRESS "31" 
"START" 



I END 1 I END 1 



Figure 4-9. Accessing Calibration Steps 27, 28, 29, 30, and 31 (System 19) 



4-13 
981-0001 




' 


( 


PRESS '28' 
■START" 


* 


( - ) 



PRESS -SELECT' 



SEL FUNCTION <l 



PRESS -la' 



SEL I 

FUNCTION 13 < I 



ENTER PASSWORD 
[PRESS "SHIFT 2' 
AND BACK SPACE 
SIMULTANEOUSLY! 



o 



PRESS ■START" 



/fill ram 00 < j 



ENTER appropriate 

ram data 
(see timing 

DIAGRAM! 



PRESS START 



PRESS "SELECT " 




PRESS -29 ■ 
■START' 



r \ 

I END j 







YES 


y' 


CAL STEP ^ 






•^ 


' 


■ 


JNO 


PRESS -ao ■ 

"START" 




PRESS "3V 
"START 


i 






1 


' 



f END J f END j 



Figure 4-10. Accessing Calibration Steps 27, 28, 29, 30, 31 (Model 100A) 



4-14 
981-0001 



4.4.2 Optional Verify-Voltage Checks 

Two calibration steps (27 and 28) have been provided 
for the measurement of first- and second-pass verify 
voltages. The family characteristics table in the applicable 
family timing diagram defines the levels for first- and 
second-pass verifications for each family. These are 
provided for the investigation of yield problems; no 
adjustments are available. Under normal circumstances, 
these steps can be eliminated from a routine calibration. 

4.4.3 Waveform Observation 

Programming waveforms of your UniPak 2^'^ can be 
observed with an oscilloscope and compared with the 
timing diagrams that are provided in appendix B. In this 
way, timing and magnitude relationships can be measured 
against known specifications to confirm that the UniPak 
2TM is performing to the device manufacturer's 
specifications. Since the UniPak 2™ generates a large 
number of waveforms and all calibration adjustments are 
accomplished In DC calibration. It is necessary only to 
observe waveforms for commonly used devices or those 
that are presenting yield problems. 

During the waveform observation phase of the 
calibration procedure, your UniPak 2™ uses a firmware 
routine that generates programming waveforms for the 
data stored in system RAM. An oscilloscope trigger pulse 
Is generated for every address Increment. This occurs after 
the reject pulse count has been reached for all the bits 
being programmed In the previous data word. The address 
is automatically reset to when the maximum PROM 
address is reached, and incrementing continues. Waveform 
observation can be done with the UniPak 2™ either on the 
calibration extender or plugged into the programmer. 

The waveform observation procedure described below 
calls for filling RAM with data so that it is possible to 
observe bit-to-program waveforms. The procedure takes 
into account the device type (VOL or VOH) so that for 
either type of PROM a bit-to-program will appear on the 
same socket contact. 

When used with a timing diagram, this procedure 
allows you to compare waveforms on the oscilloscope with 
the waveform photographs on the timing diagram for any 
type of device; a detailed explanation of the timing 
diagrams is provided In section 4.4.4. The waveform 
observation procedure is as follows: 

1. Refer to table A-1 to determine the family and pinout 
codes, polarity, and technology of the selected device. 

NOTE 
Polarity is indicated in the family code. 
Odd-numbered families are VOL and 
even-numbered families are VOH. 

2. Initiate a load operation; refer to section 3.4 for 
details. 

3. Key in the family and pinout codes when prompted by 
the programmer; see section 3.5. 



Fill your programmer's RAM with programming data 
listed in the timing diagram for the family code 
entered: the correct data depends on the polarity and 
technology of the device. Refer to table 4-3 for the 
"Fill RAM" key sequence. 

CAUTION 
Remove all devices before entering 
the calibration mode. Waveform 
generation may damage any device in 
the UniPak 2™ sockets. 



Table 4-3. 


Key Sequence To Fill RAM With Data 


System 


Key Sequence 


19 


Press SELECT A 2 




Press ENTER 




Enter data 




Press START 


29A/29B 


Press SELECT A2 




Press START 




Enter data 




Press START 


100A 


Press SELECT 1 3 




Enter Password (SHIFT 2/ 




BACKSPACE 




Enter data 




Press START 



5. Enter the waveform generation mode at step 27 on the 
measurement chart by following the key sequences 
listed in figure 4-8, 4-9, or 4-10, depending on your 
programmer. 

6. Erase waveforms for EEPROMs are observable at step 
30 or 31 of the measurement chart by following the 
key sequences listed in figure 4-8, 4-9 or 4-10, 
depending on your programmer. 

7. Trigger your oscilloscope by connecting to the test 
point under the top edge of the socket assembly (see 
figure 4-11). 

8. Ground the scope to the GND contact of the socket 
with Its LED Illuminated; the GND contacts are shown 
In figure 4-12. 

9. To observe Individual waveforms, refer to figure 4-13 
under the pinout code number entered in step 3. The 
Individual socket illustrations give the numbers of the 
socket contacts to probe when observing the 
waveforms on the timing diagram. 

NOTE 
Considerations helpful in setting up and 
interpreting the waveform displays are 
explained in section 4.4.4. 



4-15 
981-0001 




Figure 4-11. UniPak 2tm Scope Trigger Test Point 

4.4.4 Detailed Explanation of the Timing Diagrams 

This manual contains a timing diagram for each device 
family that can be programmed by the UniPak 2tm. Each 
timing diagram contains a set of waveform photographs 
that show critical programming parameters. To use these 
diagrams and photographs, read the information provided 
below and refer to the sample timing diagram (figure 4-13). 

1. FAMILY CODE NUMBER-corresponds to the family 
code number of the device (refer to table A-1). 

2. FAMILY CHARACTERISTICS TABLE- lists the 
minimum and maximum parameter values; voltage and 
timing parameters other than those listed in this table 
are to be considered noncritical with a ± 10% 
tolerance. 

3. NOTES— important information pertaining to a timing 
diagram. 



4. WAVEFORM NAMES— correspond to the pin names 
on the pinout chart (figure 4-12); the pinout chart tells 
you which socket pins to probe when you are 
observing the waveforms for a particular device pinout 
within a family. (The pinout is indicated by the number 
above each socket on figure 4-12 which corresponds 
to the pinout code on table A-1.) 

We recommend that you use the oscilloscope's single- 
sweep mode for address observation, since one trigger 
pulse is generated for each address change. 

• BIT NO PROG-Always use the 02 (bit 2) contact 
(shown in figure 4-12). 

• BIT TO PROG— always use the 01 (bit 1) contact 
(shown in figure 4-12). 

5. LAYOUT SEQUENCE NUMBER- used as a reference 
point within each diagram. 

6. DELAY TIME POSITION-indicates the time from the 
start of the main sweep to the start of the delay time. 

7. OSCILLOSCOPE GROUND REFERENCE-ground 
contact on the socket with its LED illuminated. 

8. TIME-BASE AND VOLTS-PER-DIVISION SETTINGS- 
Horizontal positioning of the waveforms is not critical 
and may vary slightly from the photographs. The 
important observation is the timing relationship 
between the waveforms in the photographs. You can 
adjust this timing relationship on your oscilloscope to 
set convenient reference points. By taking into 
account any time-base variance, you can also make 
time comparisons between photographs. The time 
base is always the same for different waveforms in the 
same photograph. 

9. EXPANDED PHOTOGRAPH NUMBER-corresponds to 
the photograph number. These detailed photographs 
are included to magnify rapid voltage changes or 
particular pulses in a pulse train. 

10. VOLTAGE— indicates volts per division. The one in the 
upper left corner is for the top trace, and that in the 
lower left corner is for the bottom trace. 



4-16 
981-0001 



Ae 




J 

16 


AS 




15 


A4 




14 


A3 




13 


AO 




12 


A1 




11 


A2 




10 


GND 


8 


9 



01 


1 


J 

16 


02 


2 


15 


03 


3 


14 


04 


4 


13 


06 


5 


12 


06 


6 


11 


07 


7 


10 


GND 


8 


9 



A6 


1 


•J 
16 


A5 


2 


15 


A4 


3 


14 


A3 


4 


13 


AO 


5 


12 


A1 


6 


11 


A2 


7 


10 


GND 


8 


9 







04 


A6 


1 


16 


A6 


2 


15 


A4 


3 


14 


A3 


4 


13 


AO 


5 


12 


A1 


6 


11 


A2 


7 


10 


GND 


8 


9 







06 


A6 


1 


18 


A5 


2 


17 


A4 


3 


16 


A3 


4 


15 


AO 


5 


14 


A1 


6 


13 


A2 
El 


7 
8 


12 
11 


GND 


9 


10 







06 


A6 


1 




A5 


2 




A4 


3 




A3 


4 




AO 


5 




A1 


6 


13 


A2 


7 


12 


A10 


8 


11 


GND 


9 


10 



A6 


1 


J 

18 


AS 


2 


17 


A4 


3 


16 


A3 


4 


16 


AO 


6 


14 


A1 


6 


13 


A2 
E2 


7 
8 


12 

11 


GND 


9 


10 



AO 


1 


J 

20 


Al 


2 


19 


A2 


3 


18 


A3 


4 


17 


A4 


5 


16 


01 


6 


15 


02 


7 


14 


03 


e 


13 


04 


9 


12 


GND 


10 


11 



vcc 

A7 



AO 


\. 

1 


J 

20 


Al 


2 


19 


A2 


3 


18 


A3 


4 


17 


A4 


5 


16 


01 


6 


15 


02 


7 


14 


03 


8 


13 


04 


9 


12 


GND 


10 


11 



A7 


V. 

1 


J 

20 


A6 


2 


19 


A5 


3 


18 


A4 


4 


17 


A3 


5 


16 


A2 


6 


15 


Al 


7 


14 


AO 
El 


8 
9 


13 
12 


GND 


10 


11 



A6 


1 


J 

20 


A5 


2 


19 


A4 


3 


18 


A3 


4 


17 


AO 


5 


16 


Al 


6 


15 


A2 


7 


14 


A10 
El 


8 
9 


13 
12 


GND 


10 


11 



A6 




20 


AS 




19 


A4 




18 


A3 




17 


AO 




16 


Al 




16 


A2 




14 


A10 




13 


All 




12 


GND 


10 


11 



VCC 
A7 



AO 


1 


20 


Al 


2 




A2 


3 




A3 


4 




A4 


5 




01 


6 




02 


7 




03 


8 




04 


9 




GND 


10 





A7 


1 


A6 


2 


A5 


3 


A4 


4 


A3 


5 


A2 


6 


Al 


7 


AO 


8 


01 


9 


02 


10 


03 


11 


GND 


12 



A7 


1 


J 

24 


A6 


2 


23 


A5 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


la 


AO 


8 


17 


01 


9 


16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 







^-' 




A7 


1 




24 


A6 


2 




23 


A5 


3 




22 


A4 


4 




21 


A3 


5 




20 


A2 


6 




19 


Al 


7 




18 


AO 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


ND 


12 




13 







^-' 




A7 


1 




24 


A6 


2 




23 


A5 


3 




22 


A4 


4 




21 


A3 


5 




20 


A2 


6 




19 


Al 


7 




18 


AO 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



03 
GND 



1 




24 


2 




23 


3 




22 


4 




21 


5 




20 


6 




19 


7 




18 


8 




17 


9 




16 


10 




15 


11 




14 


12 




13 



VCC 
AS 











A7 


1 




24 


A6 


2 




23 


A5 






22 


A4 






21 


A3 






20 


A2 






19 


Al 






18 


AO 






17 


01 






16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



03 
GND 



1 




24 


2 




23 


3 




22 


4 




21 


5 




20 


6 




19 


7 




18 


8 




17 


9 




16 


10 




15 


11 




14 


12 




13 



A9 
AlO 
E2 



03 
GND 



1 




24 


2 




23 


3 




22 


4 




21 


5 




20 


6 




19 


7 




18 


8 




17 


9 




16 


10 




15 


11 




14 


12 




13 



VCC 
A8 



02 

03 

GND 



1 




24 


2 




23 


3 




22 


4 




21 


5 




20 


6 




19 


7 




18 


8 




17 


9 




16 


10 




15 


11 




14 


12 




13 



VPP 

E2 

El 







23 




A7 




^ 


24 


A6 






23 


AS 






22 


A4 






21 


A3 






20 


A2 






19 


Al 






18 


AO 






17 


01 






16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



VCC 
AS 



A10 
PE 
08 
07 
06 
05 
04 











A7 


1 




24 


A6 


2 




23 


A5 


3 




22 


A4 


4 




21 


A3 


6 




20 


A2 


6 




19 


Al 


7 




18 


AO 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


GNO 


12 




13 



VCC 

A8 

A9 

All 

VPP 

A10 







■^ 




A7 


1 




24 


A6 


2 




23 


AS 


3 




22 


A4 


4 




21 


A3 


5 




20 


A2 


6 




19 


Al 


7 




18 


AO 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



VCC 
A8 



A10 
All 











A7 


1 




24 


A6 


2 




23 


AS 


3 




22 


A4 


4 




21 


A3 


5 




20 


A2 


6 




19 


Al 


7 




18 


AO 


8 




17 


01 


9 




16 


02 


10 




IS 


03 


11 




14 


GND 


12 




13 



VCC 
A8 



VDD 

VPP 







^-' 




A7 


1 




24 


A6 


2 




23 


AS 


3 




22 


A4 


4 




21 


Al 


5 




20 


A2 


6 




19 


Al 


7 




18 


AO 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



VCC 
A8 



VDD 
VPP 





^ 1 


A7 


1 


24 


A6 


2 


23 


A5 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


18 


AO 


8 


17 


01 


9 


16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



VCC 

A8 

A9 

VBB 

A10 

VDD 

VPP 

08 

07 





^ 1 


A7 




24 


A6 




23 


A5 




22 


A4 




21 


A3 




20 


A2 




19 


Al 




18 


AO 




17 


01 




16 


02 


10 


16 


03 


n 


14 


GND 


12 


13 



VCC 

A8 

A9 

A12 

VPP 

A10 

All 

08 

07 

06 

05 

04 







^-^ 




VPP 

Ei 


1 
2 




28 
27 


A7 


3 




26 


AS 


4 




25 


A6 


6 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AO 


10 






01 


11 






02 


12 






03 


13 






GND 


14 







VCC 
E2 



A10 
All 



CAUTION 

To observe a bit-to-program 
waveform, always use the 01 
contact. 

To observe a no-bit-to- 
program waveform, always 
use 02. 




PINOUT 
CODE NUMBER 



WAVEFORM 
NAMES 



PIN NUMBER 



Figure 4-12. Pin Names by Pinout Code Numbers 



4-17 
981-0001 





^ 1 


VPP 




28 


A13 




27 


A7 




26 


A6 




25 


A5 




24 


M 




23 


A3 




22 


A2 




21 


A1 




20 


AO 


10 


19 


01 


11 


18 


02 


12 


17 


03 


13 


16 


GND 


14 


15 









32 










^ 




VCC 


VPP 


1 




28 


E2 


A12 


2 




27 


NC 


A7 


3 




26 


AS 


A6 


4 




Z 


AS 


A5 


5 




24 


A12 


A4 


6 




23 


PE 


A3 


7 




22 


A10 


A2 


8 




21 


All 


A1 


9 




20 


OS 


AO 


10 




19 


07 


01 


11 




18 


06 


02 


12 




17 


06 


03 


13 




16 


04 


GND 


14 




15 



VCC 

AM 

A13 

A8 

A9 

All 

OE 

A10 

CE/PGM 

08 







33 








'-'' 




VPP 






28 


A12 






27 


A7 






26 


A6 






26 


A5 






24 


A4 






23 


A3 






22 


A2 






21 


A1 






20 


AO 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




IS 



VCC 
PGM 



A9 
All 

Se 

A10 
CE 
08 
07 
06 
06 







34 


A6 


1 


18 


A6 


2 


17 


A4 




16 


A3 




15 


AO 




14 


A1 




13 


A2 
E2 




12 
11 


GND 




10 



VCC 

A7 

AS 

AS 

01 

02 

03 



03 
GND 







24 






23 






22 






21 






20 






19 






IS 






17 






16 


10 




15 


11 




14 


12 




13 



A9 

VPP 

E2 

E3 

PE 

08 

07 







36 








v^ 




A7 






24 


A6 






23 


AS 






22 


A4 






21 


A3 






20 


A2 








Al 








AO 








01 








02 


10 






03 


11 






GND 


12 















A7 






24 


A6 






23 


A5 






22 


A4 






21 


A3 






20 


A2 






19 


Al 






18 


AO 






17 


01 






16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



VCC 
AS 



A6 


1 


-* 

18 


AS 


2 


17 


A4 




16 


A3 




15 


AO 




14 


Al 




13 


A2 




12 


61 


8 


11 


GND 


9 


10 











NC 


1 




28 


A12 


2 




27 


A7 


3 




26 


A6 


4 




25 


A5 


5 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AO 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



A9 

All 

n 

AlO 











A7 


1 




24 


A6 


2 




23 


A5 






22 


A4 






21 


A3 






20 


A2 






19 


Al 






18 


AO 






17 


01 






16 


02 


10 




IS 


03 


11 




14 


GND 


12 




13 



A10 
E2 



AO 




20 


Al 




19 


A2 




18 


A3 




17 


A4 




16 


01 




15 


02 




14 


03 




13 


04 




12 


GND 


10 


11 





^ 1 


A7 




24 


A6 




23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


Al 




18 


AO 




17 


01 




16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 





^ 1 


A7 




24 


A6 




23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


Al 




IS 


AO 




17 


01 




16 


02 


10 


IS 


03 


11 


14 


GND 


12 


13 







24 






23 






22 






21 






20 






19 






18 






17 






16 


10 




IS 


11 




14 


12 




13 



VCC 

AS 

A9 

A12 

VPP 

AlO 

All 

08 

07 

06 

06 



AO 


^ 

1 


y 

20 


Al 


2 


19 


A2 




18 


A3 




17 


A4 




16 


01 




15 


02 




14 


03 




13 


04 




12 


GND 


10 


11 



VCC 
A7 











A7 


1 




24 


A6 


2 




23 


A5 


3 




22 


A4 


4 




21 


A3 


5 




20 


A2 


6 




19 


Al 


7 




IS 


AO 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



E3 

CK 

VPP 

OS 

07 

06 

OS 







49 








^^ 




A7 






24 


AS 






23 


AS 






22 


A4 






21 


A3 






20 


A2 






19 


Al 






18 


AO 






17 


01 






16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



VCC 

AS 

A9 

All 

VPP 

AlO 





5 
1 





A7 


24 


A6 


2 


23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


Al 




18 


AO 




17 


Ol 




16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



VCC 
AS 



AlO 
All 
OS 
07 
06 
05 



(Socket Adapter 
Required) 







^ 




VPP 


1 




28 


A12 


2 




27 


A7 


3 




26 


A6 


4 




26 


AS 


S 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AO 


10 




19 


Ol 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




16 



VCC 
PGM 
A13 



AO 
GND 



V 


' 20 




19 




18 




17 




16 




15 




14 


e 


13 


9 


12 


10 


11 



(Sock at Adapter 
Required) 



AlO 
All 



Aa 


1 




Al 


2 


39 


A2 


3 


38 


A3 


4 


37 


A4 


5 


36 


AS 


6 


35 


A6 


7 


34 


A7 


8 


33 


VCC 


9 


32 


NC 


10 


31 


NC 


11 


30 


NC 


12 


29 


NC 


13 


2S 


NC 


14 


27 


NC 


15 


26 


NC 


16 


25 


NC 


17 


24 


XTAL 


18 


23 


XTAL 


19 


22 


GND 


20 


21 



06 

07 

OS 

VPP 

PGM 

GND 

El 

NC 

NC 

NC 

All 

AlO 

A9 

AS 



59 

(Socket Adopter 

Required) 



E3 


1 


40 


XTAL 


2 


39 


XTAL 


3 


38 


CK 


4 


37 


NC 


5 


36 


ViL 


6 


35 


EA 


7 


34 


NC 


8 


33 


VIL 


9 


32 


NC 


10 


31 


NC 


11 


30 


ADS 


12 


29 


A01 


13 


2S 


AD2 


14 


27 


AD3 


16 


26 


AD4 


16 


25 


ADS 


17 


24 


ADS 


18 


23 


AD7 


19 


22 


GND 


20 


21 



PE 


1 


40 


E3 


2 


39 


NC 


3 


38 


E3 


4 


37 


VPP 


6 


36 


NC 


6 


3S 


15 


7 


34 


E3 


S 


33 


n 


g 


32 


E3 


10 


31 


CK 


11 


30 


ADS 


12 


29 


ADl 


13 


28 


AD2 


14 


27 


ADS 


15 


26 


AD4 


16 


26 


ADS 


17 


24 


AD6 


IS 


23 


AD7 


19 


22 


GND 


20 


21 



56 

(Socket Adapter 

Required) 



67 

(Socket Adapter 

Required) 



VCC 

NC 

NC 

NC 

NC 

NC 

NC 

NC 

NC 

NC 

NC 

NC 

VIL 

VIL 

VPP 

PGM 

VIL 

ViL 

AS 

AS 



VCC 

NC 

NC 

NC 

NC 

NC 



NC 
NC 
NC 
AlO 



E3 


1 ^ 


■" 40 


XTAL 


2 


39 


XTAL 


3 


38 


CK 


4 


37 


NC 


5 


36 


ViL 


6 


36 


EA 


7 


34 


NC 


8 


33 


NC 


9 


32 


NC 


10 


31 


NC 


11 


30 


ADS 


12 


29 


ADl 


13 


28 


AD2 


14 


27 


AD3 


15 


28 


AD4 


16 


26 


AD5 


17 


24 


A06 


18 


23 


AD7 


19 


22 


GND 


20 


21 





w 1 


A7 


1 


24 


A6 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


18 


AO 


8 


17 


01 


9 


IS 


02 


10 


16 


03 


11 


14 


GND 


12 


13 



VCC 

A8 

A9 

E3 

El 

NC 

E2 

OS 

07 

06 



VCC 

NC 

NC 

NC 

NC 

NC 



NC 

NC 

NC 

NC 

ViL 

ViL 

VPP 

PGM 

VIL 

VIL 

A9 

AS 



A7 


V. 


J 

24 


A6 




23 


A5 




22 


A4 




21 


A3 




20 


A2 




19 


Al 




18 


AO 




17 


01 




16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



E3 


1 


J 

40 


XTAL 


2 


39 


XTAL 


3 


3S 


CK 


4 


37 


NC 


6 


36 


VIL 


6 


35 


EA 


7 


34 


NC 


8 


33 


NC 


9 


32 


NC 


10 


31 


NC 


11 


X 


ADS 


12 


23 


A01 


13 


28 


A02 


14 


27 


AD3 


15 


26 


AIM 


IS 


26 


ADS 


17 


24 


AD6 


IS 


23 


AD7 


19 


22 


GND 


20 


21 



NC 

NC 

NC 

ViL 

ViL 

VPP 

PGM 

VIL 

AlO 

AS 

AS 





^ 1 


A7 


1 


24 


A6 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


18 


AO 


8 


17 


01 


9 


16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



Figure 4-12. Pin Names by Pinout Code Numbers (Continued) 



4-18 
981-0001 





^ 1 


A7 




21 


A6 




23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


A1 




18 


AO 




17 


01 




16 


02 


10 


15 


03 


11 


14 


GNO 


12 


13 



A7 


1 


J 

24 


A6 


2 


23 


A5 


3 


22 


A4 


4 


21 


A3 


S 


20 


A2 


6 


19 


A1 


7 


18 


AO 


8 


17 


01 


9 


16 


02 


10 


IS 


03 


11 


14 


GND 


12 


13 



El 

E2 

A10 

VPP 

08 

07 

06 

OS 







65 












A7 






24 


A6 






23 


AS 






22 


A4 






21 


A3 






20 


A2 






19 


A1 






18 


AO 






17 


01 






16 


02 


10 




IS 


03 


11 




14 


GND 


12 




13 



A7 




24 


A6 




23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


A1 




IS 


AO 




17 


01 




16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



A7 


V. 


J 

24 


AS 




23 


A5 




22 


A4 




21 


A3 




20 


A2 




19 


A1 




18 


AO 




17 


01 




16 


02 


10 


15 


03 


11 


14 


GNO 


12 


13 



vcc 

AS 



All 
A12 
08 
07 





^ 1 


A7 




24 


A6 




23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


A1 




18 


AO 




17 


01 




16 


02 


10 


15 


03 


11 


14 


GNO 


12 


13 





^ 1 


A7 


1 


24 


A6 


2 


23 


A5 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


A1 


7 


18 


AO 


8 




01 


9 




02 


10 




03 


11 




GND 


12 













VPP 






28 


N/C 






27 


A7 






26 


A6 






25 


A5 






24 


A4 






23 


A3 






22 


A2 






21 


A1 9 




20 


AO 


10 




19 


01 


n 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




IS 







^^-^^ 




VPP 


1 




28 


N/C 


2 




27 


A7 


3 




26 


A6 


4 




25 


AS 


5 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


A1 


9 




20 


AO 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



A10 







^~'~ 




VPP 






28 


N/C 






27 


A7 






26 


A6 






25 


AS 






24 


A4 






23 


A3 






22 


A2 






21 


A1 






20 


AO 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



A9 

N/C 

El 

N/C 

n 

08 
07 
06 
OS 
04 



A7 


>, 


24 


AS 




23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


A1 




18 


AO 




17 


01 




16 


02 


10 


IS 


03 


11 


14 


GND 


12 


13 



A7 


1 


24 


A6 


2 


23 


A5 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


A1 


7 


18 


AO 


8 


17 


01 


9 


16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



El 

CLK 

08 





^ 1 


A7 


1 


24 


A6 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


6 


20 


A2 


6 


19 


A1 


7 


18 


AO 


8 


17 


01 


9 


16 


02 


10 


IS 


03 


11 


14 


GND 


12 


13 



VCC 
AS 

A9 

PGM 

EKVPPI 

A10 

E2ICLKI 

08 

07 



(Socket Adapter 
Required) 



A8 




20 


A7 




19 


A6 




18 


AS 




17 


A4 




16 


A3 




IS 


A2 




14 


A1 




13 


AO 




12 


GND 


10 


11 



VCC 

A9 

A10 

All 

E1(VPPI 

E2ICLKI 

01 

02 





(Socket Adapter 




R 


equired 




A7 






24 


AS 






23 


AS 






22 


A4 






21 


A3 






20 


A2 






19 


A1 






18 


AO 






17 


01 






16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



A9 
A10 



79 

(Socket Adapter 
Required) 



A3 


Ky i 

1 241 


A4 


2 


23 


AS 


3 


22 


A6 


4 


21 


A7 


5 


20 


A8 


6 


19 


01 


7 


18 


02 


8 


17 


03 


9 


16 


04 


10 


15 


NC 


11 


14 


GND 


12 


13 



80 

(Socket Adapter 
Required) 



A7 


1 


24 


A6 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


6 


20 


A2 


6 


19 


A1 


7 


18 


AO 


8 


17 


MODE 


9 


16 


DCLK 


10 


15 


SDI 


11 


14 


GND 


12 


13 



A10 

A11_ 

EA/ES/INIT 







81 








\^ 




A7 


1 




24 


A6 


2 




23 


AS 


3 




22 


A4 


4 




21 


A3 


5 




20 


A2 


6 




19 


A1 


7 




18 


Ae 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



E3 

E2 

INT 

El 

CK 

08 

07 

06 

05 





S 


2 


A7 


24 


A6 




23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


A1 




18 


At 




17 


01 




16 


02 


10 


IS 


03 


11 


14 


GND 


12 


13 



VCC 

A8 

NC 

VPP 

E2 

NC 

PE 

08 

07 

06 

OS 

04 





(Socket Adapter 




Required) 


A3 


1 24 


A4 


2. 23 


A5 


3 22 


A6 


4 21 


A7 


5 20 


AS 


6 19 


01 


7 18 


02 


8 17 


03 


9 16 


04 


10 15 


PE 


11 14 


GND 


12 13 



VCC 
A2 

Al 
At 

El 
E3 



84 

(Socket Adapter 

Required) 



A3 


^~f 

1 24 


A4 


2 


23 


NC 


3 


22 


AS 


4 


21 


A6 


5 


20 


A7 


6 


19 


01 


7 


18 


02 


8 


17 


03 


9 


16 


04 


10 


16 


PE 


11 


14 


GND 


12 


13 



VCC 
A2 



85 

(Socket Adapter 
Required) 



A3 


»s- 


22 


A4 




21 


AS 




20 


AS 




19 


A7 




IS 


AS 




17 


01 




16 


02 




IS 


03 




14 


04 


10 


13 


GND 


11 


12 



Al 

AO 

E2(CLK) 

EKVPP) 

CK 

08 

07 

06 

05 





^ 1 


A7 


1 


24 


A6 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


18 


A8 


8 


17 


01 


9 


16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



VCC 
AS 



E2_ 
INIT 



87 

(Socket Adapter 

Required) 



A7 


1 


24 


AS 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


18 


A8 


8 


17 


IMODE 


9 


16 


oax. 


10 


15 


SDI 


11 


14 


GND 


12 


13 



AB 

A9 
A10 

All 

EA/ES/INtT 

01 

02 

03 



(Socket Adapter 
Required) 



A7 


1 


24 


AS 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


6 


20 


A2 


6 


19 


Al 


7 


18 


A6 


8 


17 


IVIODE 


9 


16 


DCLK 


10 


15 


SDI 


11 


14 


GND 


12 


13 



VCC 
AS 



E/ES 

INIT/INITS 



(Socket Adapter 
Required) 





1 


A7 


1 


24 


A6 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


S 


20 


A2 


6 


19 


Al 


7 


18 


Aa 


S 


17 


MODE 


9 


16 


DCLK 


10 


15 


SDI 


11 


14 


GND 


12 


13 



A8 
A9 
A10_ 

E/ES 

[N[T/INiTS 

01 

02 

03 

04 

NC 

CLK 



Figure 4-12. Pin Names by Pinout Code Numbers (Continued) 



4-19 
981-0001 



96 
(Socket Adapter 

Required) 





^ 1 


A7 


1 


24 


A6 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


18 


AO 


8 


17 


MODE 


9 


16 


DCLK 


10 


15 


SDI 


11 


14 


GND 


12 


13 



A10 

All 

E/ES/INIT/INnS 

01 

02 

03 

04 







96 








^^ 




A7 


1 




24 


AS 


2 




23 


AS 


3 




22 


A4 






21 


A3 






20 


A2 






19 


Al 








AO 








01 








02 


10 






03 


11 






GND 


12 







vcc 

AS 

A9 

PGM 

Si 

A10 

CE 

08 

07 

0« 





W 




E3 

NC 


1 
2 


28 
27 


VCC 
PGM 


A7 




2S 


NC 


AS 




25 


AS 


AS 




24 


A9 


A4 
A3 




23 
22 


All 
OE 


A2 

Al 




21 
20 


A10 
CE 


AO 


10 




OS 


01 


11 




07 


02 


12 




06 


03 


13 




05 


GND 


14 




04 







98 








~^~'~ 




E3 


1 




28 


A12 


2 




27 


A7 


3 




26 


AS 


4 




25 


AS 


5 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AS 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



VCC 
PGM 



A9 

OE 
AID 







A2 








^ 




E3 


1 




28 


NC 


2 




27 


A7 


3 




26 


A6 


4 




25 


A5 


5 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AO 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



VCC 
PGM 



A9 
NC 
OE 
A10 
CE 
08 
07 





A 

^ 


3 


A7 


24 


A6 




23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


Al 




IS 


AS 




17 


Ol 




16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



A9 
AlO 
PRESET 











A15 


1 




28 


A12 


2 




27 


A7 


3 




26 


AS 


4 




25 


AS 


5 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AO 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



VCC 

A14 
A13 
AS 
A9 
All 
OE/VPP 

A10 

CE/PGM 
08 
07 
06 







A5 








^^ 




VPP 


1 




28 


A12 


2 




27 


A7 


3 




26 


A6 


4 




25 


AS 


5 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AS 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



VCC 

NC 



ATI 

oe 

A10 
CE 







^^>'^ 




B/B 


1 




28 


A12 


2 




27 


A7 


3 




26 


Afi 


4 




25 


AS 


5 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AO 


10 




19 


01 


11 




18 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



VCC 
WE 



All 
OE 
AlO 





(Socket Adapter 






A7 


1 24 


A6 


2 23 


AS 


3 22 


A4 


4 21 


A3 


5 20 


A2 


6 19 


Al 


7 18 


AS 


8 17 


MODE 


9 16 


DCLK 


10 IS 


SDI 


11 14 


GND 


12 13 



EA/ES 
INIT 



SDO 
PCLK 



AD 

(SockM 
Required! 





1 


A7 


1 


24 


A6 


2 


23 


AS 




22 


A4 




21 


A3 




20 


A2 




19 


Al 




18 


AS 




17 


MODE 




16 


DCLK 


10 


15 


SDI 


11 


14 


GND 


12 


13 



AS 

AS 

A10_ 

EA/ES 

INIT 

01 

02 

03 



SDO 
PCLK 





1 


A7 


1 


24 


A6 


2 


23 


A5 


3 


22 


A4 


4 


21 


A3 


6 


20 


A2 


6 


19 


Al 


7 


IS 


AO 


S 


17 


01 


9 


16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



VCC 

A8 

A9 

AlO 

E2/VPP 

E3/ VFY 

E4/PGM 

08 

07 

06 





1 


A7 


1 


24 


A6 


2 


23 


AS 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


18 


AS 


8 


17 


Ol 


9 


16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 



VCC 
AS 
A9 
AlO 

(NIT /VPP 

ES / E /V FY 

CK/PGM 

08 

07 







Bl 












A7 


1 




24 


A6 


2 




23 


AS 


3 




22 


A4 


4 




21 


A3 


5 




20 


A2 


6 




19 


Al 


7 




18 


AS 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



CLR 
ES 



A7 


1 


24 


AS 


2 


23 


A5 


3 


22 


A4 


4 


21 


A3 


5 


20 


A2 


6 


19 


Al 


7 


18 


AS 


8 


17 


01 


9 


16 


02 


10 


15 


03 


11 


14 


GND 


12 


13 







B3 








*— *"" 




A7 


1 




24 


A6 


2 




23 


AS 


3 




22 


A4 


4 




21 


A3 


5 




20 


A2 


6 




19 


Al 


7 




18 


AS 


8 




17 


01 


9 




16 


02 


10 




15 


03 


11 




14 


GND 


12 




13 



AlO 

A11_ 

EA/ES 



1 


^ 


28 


2 




27 


3 




26 


4 




25 


5 




24 


6 




23 


7 




22 


8 




21 


9 




20 


10 




19 


11 




18 


12 




17 


13 




16 


14 




15 



VCC 
WE 



A9 
All 











VPP 


1 




28 


A12 


2 




27 


A7 


3 




26 


A6 


4 




25 


A5 


5 




24 


A4 


6 




23 


A3 


7 




22 


A2 


8 




21 


Al 


9 




20 


AS 


10 




19 


01 


11 




IS 


02 


12 




17 


03 


13 




16 


GND 


14 




15 



A9 
All 



Figure 4-12. Pin Names by Pinout Code Numbers (Continued) 



4-20 
981-0001 



10. VOLTAGE 9. EXPANDED 8. DELAY TIME-BASE 

PHOTOGRAPH AND MAIN 

TIME-BASE - 




2-<- 







FAMILY CHARACTERISTICS 






v.m.Bu 


M,N 


NOM 


M., 


UN,. 


"-"E-S 


PRDCRAW 


VCCP 


^^b 


bO 


5 25 




Nor Sho^n 




VOP 


200 


205 


J' D 








IPW 


9C 


100 


"" 








Be*.i 




a 




P... 


NA 




0--.p-oy.,- 




" 




''■""' 




ir 


H.ah taa.1 


;■ 


:: 


:: 




™»|~ 


.ND.ASS 


vcc 


','. 


11 






K< 1666 Tp; 






12 








:;i;;; 



DESCRIPTION 



■h SOI to: fgmily 02 



CM, PE DATE 



DMA I/O 



TIMING DIAGRAM 
FAMILY CODES XX, XX. 



CODE IDENT NO 

54193 



DRAWN BY 

-3 



DRAWING NO 

33-950-0059 



[sheet 1. 



7. OSCILLOSCOPE 
GROUND 
REFERENCE 



6. DELAY TIME POSITION 

5. LAYOUT SEQUENCE 
NUMBER 



4. WAVEFORM 
NAME 

3. NOTES 



2. FAMILY 

CHARACTERISTICS 
TABLE 



1. FAMILY CODE 
NUMBER 



Figure 4-13. Sample Timing Diagram 



4-21 
981-0001 



This page left intentionally blank. 



4-22 
981-0001 



Measurement Chart 



4-23 
981-0001 



•a 

0) 

3 
C 
*3 

C 

o 
o 

t 

m 
O 

c 

0) 

E 
« 

3 
10 
CO 

» 

n 







O 

1—1 




























E 






CL 

E 














c 




























o 






o 


+J 








































u 






o 














Q. 




























c 






c 


x: 








































o 






o 














r^ 




























J3 


s 




J2 

%- 


2 












■p 




























TO 


(A 




10 


t/i 












(0 <1J 




























<~> 


<D 


S- 


o 


<U 










































01 
















z u 




























3 


i- 


■u 


3 


i- 












UJ o 

2 w 




























CM 


0) 
1/) 


^ 


CM 


to 


t- 










|2 


































»• 




OJ 




































E 


c 


+J 


E 


c 


■p 




































o 


•'" 


<u 


o 


•1- 


g 










S 






























s- 


s- 


1 


s- 












s: 




























o 


o 


s- 


o 


o 


4J 










Q 




























o 

1— t 


4-» 
iA 


3 


o 

f-H 




cu 










X) 






































u 










c 




























TO 


i/i 


(U 


TO 


Ol 


s- 










3 






























HI 


.c 




OJ 


3 










O 




























(U 


i- 


+-> 


OJ 


i- 


<J 








4-> 


l_ 




























W 






t/) 












o 




























ZD 






^ 












fO 














































































































O 


O 


TS 


a 


























c 

E 
0) 

s- 

3 










LD 






CT^ 


<T. 


<Tt 


LO 








O 






o 












t 








LD 






UD 


^O 


UD 


<^ 








LO 






UD 












i 








1 






.— 1 
I 

T— 1 


t— 1 

t 
1—1 


1—1 

1 

r-H 


1-H 

) 
CM 








1—1 






U3 
1— 1 

1 












< 








t-H 






O 


o 


O 


O 








OO 






OO 


















o 






r^ 


r^ 


r^ 


r--. 








o 






o 


















^^ 






•< 














r^ 






r^ 












LO 














CM 


LO 


1—1 


oo" 














« 




















co" 






LO 


1—1 


ro 


CM 








ro 






CM 


















Cd 






CXl 


ai 


oc 


q: 








or 






Od 












E 

+-> 






























<• 










































>- 




> 


^ 




























> 


>• 


>- 


> 


> 


> 


>• 


o 


> 


o 








<c 














X 
< 

S 








UD 


o 


O 


1— ( 


CM 


CM 


CM 


en 


r-- 


LO 


LO 






E 












a. 










^' 


KO 


^n 


CM 


CO 


<^ 


LO 


lO 


1— ( 


ro 


d 






CM 




















r-H 


C\l 


CM 


1—1 


CO 


CM 


■-• 




1—1 




CM 






CM 
1—1 












c 


Z 






























--r 














































o 


















ZD 


UJ 

s 

Ul 


s 








> 






>• 
O 


o 


O 


> 

o 












1 














3 


o 








-^ 






CM 


CO 


^ 


LO 








d 






O 














UJ 

s 










.—I 






.— H 


CO 


CM 


I— ( 








CM 






CM 










































^ 






1— ( 




















> 


> 


> 


>■ 


>■ 


> 


>• 


o 


> 


> 

o 


^ 






% 
















2 








^ 


o 


O 


CT) 


r-^ 


r^ 


CO 


r-^ 


n 


ro 


LD 






CO 
















s 








^3- 


in 

00 


LO 
CM 


1— ( 
t— 1 


CM 
CO 


LO 

CM 


^ 


vo 


d 
f— 1 


oo 


.—I 






^ 
















c: 
















































o 
































































































+-> 














































TU 


ra 




C\J 


^■ 


ro 










CM 


o^ 


CM 
























OJ 


S- 




D_ 


Q. 


o_ 










Q_ 


C3_ 


Dl, 
























E 


X3 




1— 


(— 


(— 










1— 


I— 


1— 
























S_ 
















































o 






LD 


LD 


LO 










LO 


LO 


LO 
























M- 


fO 




LO 


m 


LO 










LO 


LO 


LO 
























S- 


o 




^ 


vo 


t£) 










\D 


<^ 


LD 






















z 
o 


OJ 










f— 1 










1—1 


1 — 1 


r—t 






















Q. 


OJ 


















1 


1 


























.c 


















1—1 


























u 

2 


<U 


+-> 




o 


O 


o 










o 


o 


o 






















TO 


o 




r^ 


r^ 


r^ 










r^ 


r^ 


r^ 




















UJ 


CO 


CO 


CO 








5 










UJ 


t/J 


CNJ 










































o 


un 


CM 




s 

UJ 


4-) 


TO 


































































3 


en 


D_ 










































ui 










(A 


c 


•1— 










































IL 










2 c 


i 

o 


ID 








^ 


































































































(L> 


S- 






Cl_ 


^ 


o 


CT> 


00 








<Ti 






o> 
























r— 


,C 


(U 






^^ 


CM 


CM 








































+-' 


o 


■4-> 


■o 






+J 












































aj 


4- 




c 






at 












































.^ 




x; 


OJ 






ji^ 












































u 


cu 


-M 


-M 






o 


CM 


CM 


CM 


CM 








CM 






CM 






















o 


^ 




X 






o 












































Ul 


h- 


"i 


OJ 






00 






















































^ ^ 


































0) 


2 




















OJ 


■— ^ 
































z 


g 






















OJ 

en 






















>» 










o 






















TO 
















■g 






Q. 










55 


c 










z 








>, 




S- 










>^ 




r^ 








Q. 










> 


u 










o 










SI 


















O 






3 










UJ 

Q 










1 








o. 


CT 


s 










O- 




CL 


C\J 






l/l 










LU 
















Q. 




o 










Q. 




CL 


















oc 


















3 


.C 










>> 


3 




3 


cu 






QJ 






















oc 








CO 














(A 




(/) 


o 






<J 






















ii 




















CL 








!- 






S» 






















Vi 

Q 

a 

Ui 








a; 


>> 


>> 








O. 


<D 


>^ 


<D 


:3 






3 




























u 






>, 




>j 


3 


U 




O 


o 






O 



















ro 










c 


Q. 


'q. 




>> 




v> 


C 


Q. 


C 


t/l 






VI 
















n 


cu 










cu 


Q. 


Q. 


Q. 




Q. 




OJ 


Q. 


OJ 
























CO 


CD 










i- 


3 


3 


Q. 


'q. 


CL 


t/) 


s- 


3 


S- 


4-J 






4-> 




















H 








(U 


Vi 


LO 


3 


a. 


3 


trt 


(1) 


in 


O) 


C 






C 






























4- 






t/i 


=3 


(/I 


<D 


M- 




l4- 


OJ 






CU 
















— , 


p^ 












QJ 


TJ 


-o 




U) 




S. 


OJ 


■g 


<u 


s- 






S- 
















(_j 


(;_> 












S- 


n3 


TO 


<~ 




-*-> 


■o 


i_ 


TO 


s- 


s- 






S- 
















LU 


LU 












> 


O 

—1 


O 

-J 


(_ 
> 


LU 


CO 


-a 

< 


>• 


o 
_J 


> 


3 






3 

o 






















to o 








r-t 


CM 


ro 


<d- 


LO 


"JD 


r-^ 


00 


cr. 


o 


r—i 






CM 












S 










jsi 


























1—1 


r-H 






1—1 












1- 


^ 


O 


Q 




(L 

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LO 






LO 






















0. 






















































LU 




r-. 






CO 




CTl 


o 






i-H 
































CA 




ou 






CM 




C\J 


ro 






CO 





















4-29 
981-0001 



Measurement 
Chart 



PROGRAM ELECTRONICS 



UNIPAK 2TM 



DAC Step Waveform 






LOAD SUPPLY DAC 



Current DAC Step Waveform 




4-30 
981-0001 



DATE 



10-82 



3-84 



REV 



REVISION RECORD 



DR 



CK 



.M^ 



.£2^ 



Bit Switch Rise-Time Waveform 






VARIABLE 


MIIM 


NOM 


MAX 


UNIT 


COMMENTS 


PROGRAM 


TR1 


29 


33 


37 


//s 






TR2 


62 


66 


70 


IJS 


Adjust R1, 
701-1690. 




TR3 


90 


100 


110 


fJS 





NOTE: All TR's are measured from 10% to 90%. 



4-31 
981-0001 



Measurement 
Chart 



PROGRAM ELECTRONICS , 



UNIPAK 2TM 



DAC Step Waveform 



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4-32 
981-0001 



DATE 



10-82 



3-84 



REV 



REVISION RECORD 



DR 



CK 



M 



DAC Step Waveform 





■ 






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BIT SUPPLY DAC 



DAC Step Waveform 




VpEp SUPPLY DAC 



4-33 

981-0001 



This page left intentionally blank. 



4-34 
981-0001 



SECTION 5 
CIRCUIT DESCRIPTION 



5.1 OVERVIEW 

This section defines the functions of UniPal< 2™ 
principal hardware components. Each circuit-card assembly 
is depicted by a block diagram accompanied by a written 
description. 

5.2 GENERAL ARCHITECTURE 

5.2.1 The Link Between the UniPak 2™ and the 
Programmer 

The UniPak 2tm is controlled by the programmer's 
extended processor bus through the UniPak 2tm mating 
connector (J1). The control software for the UniPak 2tm is 
located in EPROM on the memory card (702-1650). 

5.2.2 The Buses 

The programmer's address bus, data bus, R/W line 
and V»02 line access the software on the memory card and 
control the gates and registers on the waveform generator 
(701-1690) and address cards (701-1655). The UniPak 2tm's 
device bus gathers the programming waveforms produced 



by these cards and transmits them to the socket card 
(702-1659). Figure 5-1 shows the relationships between the 
buses. 

5.3 COMPONENT LAYOUT 

The principal components of the UniPak 2™ are the 
motherboard, the waveform generator, the address card, 
the socket card, and the memory card. The component 
layout of the UniPak 2tm is shown in figure 5-2 and 
described in the following subsections. 



SOCKET CARD 702 1659 



UeiVIOHYCARD702 II 



a 



rj 



MOTHERBOARD 702 II 



ADDRESS CARD 701 H 



WAVEFORM GENERATOR 701 1690 



ET 




Figure 5-2. Principal Components 



ADDRESS BUS 



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$ 



i 






DATA BUS 



S R/W 

I 



MJ^MpM^ WAVEFOR 




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MEMORY 

CARD 

702 1650 



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tttttttty^ttttt!^;;;^ 



I 

S DECODE 
S BUS 



?M 

GENERATOR 
701 1690 



^^^^^^^ 



S PIN DRIVERS 



S|^^^^^ 



^^^^^ 



ADDRESS 
CARD 



ADDRESS a DATA 




SOCKET CARD 
702 1659 


1 ' 1 
^SOCKETS 


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'II 1 


1 1 1 1 

1 


roooo^oTJoH 

l_SqCKET_LE^Sj 



S^SiSSSSSSiSiSiSSS^SSS^^ 



DATA 



PROGRAMMER 



Figure 5-1. Block Diagram, UniPak 2^'^ Electronics 



5-1 
981-0001 



5.3.1 Motherboard 

The motherboard accepts the signals and power 
supplies from the J6 of the programmer and transmits 
them to two identical 72-pin edge connectors and a 50-pin 
edge connector (see figure 5-3 and schematic 30-702-1661). 



S$SSSJS$MJSSJ5?JSS55SSS$SS^^^S!: 



L 



TO WAVEFORM GEWERATOH 701-111 



I 






TO ADDRESS CARD 701-1>E 



^ TO PROGRAMMER MAIN FRAME SS TO AOPHE 5S UAHU /WI-tbp . 



Figure 5-3. Block Diagram, Motherboard 

5.3.2 Waveform Generator 

The waveform generator provides signals required for 
programming devices. These signals are generated by the 
blocks shown in figure 5-4. 

Three major supplies are the Vqc supply, the CE 
supply and the bit supply, which are used to generate the 
respective signals. Each supply is software-controlled via a 
D/A converter. All DACs obtain their reference voltage 
from the DAC reference. 



The Vcc waveforms are generated by writing 
appropriate DAC values from the firmware. The rise and 
fall times are fixed by the slewing rate of the op amp. Two 
overcurrent detectors are included, one for low currents 
and one for high currents (above 1 amp). If a detector is 
activated, the control latch is reset; the DAC-reference kill 
output then causes the DAC reference to go to zero, in 
turn causing all supplies to return to zero. 

The Vcc supply senses the Vcc voltage at the PROM 
socket via the Vqc sense line. This remote sensing 
compensates for all cable drops between the supply and 
the socket. 

The CE waveforms are generated by using the CE 
supply in conjunction with one of the pin switches. The 
voltage level is selected by writing the appropriate value to 
the CE DAC. One of two rise times is selected by the 
control latch and rise-time control circuitry. Either the pin 
18, 20 or 21 switch can be enabled by the switch-control 
latch to output the high-level CS voltage. Switches that are 
not enabled can output TTL levels. 

Each pin switch consists of an emitter follower with 
the collector tied to the CE supply. A current source is 
provided for the base of each switch to charge the 
common rise-time capacitor. When the base is released, a 
linear ramp is generated which is truncated at the CE 
supply level. An NPN-transistor pulldown is included in the 
switch to provide a 20V //ys controlled fall time. Logic 
circuitry prevents the pulldown and pullup circuits from 
being active simultaneously. 



PROCESSOR BUS 




Figure 5-4. Bioclt Diagram, Waveform Generator 

5-2 
981-0001 



■^ BIT »J^LY 



OVCNCUIWCNT CONTdOL 



nM.LOO«N coNTnoi 



The pin 21 switch uses the same principles as the pin 
18 and pin 20 switches. However, a power amplifier output 
(0/-5V supply) provides the ground reference for the 
switch. For certain programming algorithms this amplifier 
output is brought to -5V. 

The pin 20 switch includes a pullup that is connected 
to the + 12/ +5V supply, thus allowing the switch in the 
TTL mode to switch from to 12V as well as from to 
5V. The + 12/ +5V supply consists of a monolithic 
regulator and a 5.1V zener diode controlled by the switch- 
control latch. 

Signals to be applied to the data lines of a device are 
generated with the bit-supply signals and controlled by the 
bit-supply switch. The bit supply is nearly identical to the 
CE supply, but has one less diode in the feedback path, 
compensating for one less drop in the switch paths. The 
bit-supply switch consists of an emitter follower, a current 
source, and three rise-time control capacitors. The collector 
of the emitter follower is connected to the bit supply; the 
base is connected to the current source and timing 
capacitor. The control latch can select the timing capacitor 
and also control the base of the switch. When the base is 
released, the output ramps linearly to the bit-supply level. 
The output on the bit-supply switch is sent to the address 
card and to the pin 19 switch; unlike the pin 20, 21 and 18 
switches, the pin 19 switch consists of a simple PNP- 
saturating switch controlled by the switch-control latch. 

The current-sense integrator smoothes the transient 
overcurrent pulses occurring from charging supply 
capacitors. When an overcurrent condition from the VqC- 
CE, bit or (0/-5V) supply exists for sufficient time, the 
control latch is reset, in turn causing the DAC reference 
and the supplies to go to zero. The state of the 
overcurrent-control line can be read by the address card 
and used by the programmer to detect shorted devices. 



Table 5-1 lists the functions of the device-bus pins. The 
data latch buffers the data bus and holds data to satisfy 
the long DAC data-hold requirement. The address latch 
buffers the lower-order address lines and the primary 
decode bus. These buffered lines are then sent to the 
decoder and the address latches. The decoder provides 
decode signals to the DACs for the Vcc- CE and bit 
supplies. The switch-control latch and the control latch 
receive their clocks from a decoder on the address card. 

Table 5-1. Pin Functions, Device Bus (at J1) 



Pin 


Function 


Pin 


Function 


1 


PA, 


26 


PA, 


2 


PAa 


27 


PAe 


3 


PA,o 


28 


PAs 


4 


PA„ 


29 


PA, 


5 


PA„ 


30 


PA3 


6 


PA,3 


31 


PA. 


7 


PA,« 


32 


PA, 


8 


PA,5 


33 


PA„ 


9 


GND 


34 


Vcc 


10 


Vcc Sense 


35 


GND 


11 


CE Supply 


36 


GND 


12 


Bit Switch 


37 


Bit Supply 


13 


Pin 20 


38 


Pin 18 


14 


Pin 21 


39 


Pin 19 


15 


Scope Trigger 


40 


PD, 


16 


-9V 


41 


PD. 


17 


+ 24V 


42 


PD« 


18 


Overcurrent 


43 


PD, 


19 


Pull-Down Control 


44 


SI 


20 


Vcc Pull-Up Control 


45 


S2 


21 


Address Supply + 5V Select 


46 


S3 


22 


PD, 


47 


Vcc Pulse 


23 


PD, 


48 


Address DAC 


24 


PDe 


49 


+ 5V 


25 


PD, 


50 


Bit Switch Control 



5-3 
981-0001 



5.3.3 Address Card 

The address card, illustrated in figure 5-5, provides the 
device address, device data, data loads and supply 
measurement capability of the UniPak 2'''m. 

The address drivers consist of addressable latches 
driving the device address bus. The addressable latches 
receive data from the most-significant-bit line of the data 
bus. 

The data switch register drives PNP data switches 
which direct the output of the bit switch to the appropriate 
device-data line. The PNP switches are driven by current 
sources to provide a constant-base drive at ail bit-switch 
voltages. 

The data sink register is used to shunt programming 
currents to ground. Device data is read via the data 
comparators and strobed to the processor bus via the data 
gate. The comparators receive their reference voltage from 
the Vrep amplifier, which is controlled by the VreF DAC. 
Loading the device data bus is controlled by the load DAC, 
the load amplifier and the high/low-range load switch. This 
supply develops a voltage that is applied to either the low- 
range or high- and low-range load resistor banks. These 



resistors are fed through isolation diodes, which are 
connected to the device data pins. The load sink register 
enables the UniPak 2™ to select which device data pins 
will have loads applied to them. The diode clamps limit the 
voltage applied by the load resistors to the data bus to 
approximately 5V when the load clamp switch is closed. 

The supply comparators read the Vcc-sense line, the 
CE supply and the bit-switch line. The comparator 
gate/multiplexer strobes the data from the supply 
comparators and the overcurrent-read line to the most 
significant-bit line of the data bus. 

The socket-select latch provides a control line for the 
high-/ low-range switch and control lines for the socket 
card. 

The data latch buffers the data bus and holds data to 
satisfy the DAC requirements. 

The current source latch will supply a 4-mA current to 
a device provided there is a 15V zener diode inside the 
device on pin 18, 19 or 20. The address supply 5V select 
determines whether the address supply DAC or a fixed 5V 
will be applied to PA0-PA3. 



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-BIT SWITCH 



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LOADS ft 

ISOLATION 




« DEVICE DATA 



SOCKET 

SELECT 
-J CLK LATCH 





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1 



LOAD 
— Jj CLAMP 

SWITCH 



1 S OCKET SELECT V ^ 



Figure 5-5. Block Diagram, Address Card 



5-4 
981-0001 



The address latch buffers low-order addresses for the 
secondary decoder. The secondary decoder provides the 
appropriate signals for the DACs and registers, as well as 
the latches on this card and on the waveform generator. 
The V»02 signal controls the timing of the various clock 
signals developed by the decoder. 

5.3.4 UniPak 2™ Socket Card 

The socket card distributes to the device sockets the 
signals developed on the address card and the waveform 
generator (refer to figure 5-6). 

The device address bus (PA0-PA15) is generated on 
the address card and fed to the socket card via the ribbon 
cable. On the socket card, the bus is fed into CMOS 
buffers. The address supply DAC connects to the Vdd 
supply on these buffers. This allows the VOH level to be 
under DAC control. The address supply 5V select line 
allows PA0-PA3 to switch at TTL levels while all other 
address lines switch between "0" and the address supply 



level. The address clamps provide overvoltage protection 
and are connected to a comparator that senses 
overvoltage, shutting down all the supplies when excessive 
voltage is detected. 

The device-data bus connects directly to all sockets. 
Four-bit devices are connected to PD1-PD4. The data 
pulldowns consist of IK-ohm resistors and a diode 
network. The data clamp has two modes of operation 
controlled by the bit switch control line. 

When voltage pulses are being applied to a device, the 
pass element of the data clamp is switched out of the 
circuit. The op amp and 2.2K-ohm resistor precharge the 
0.1 /yp capacitors to the level set by the bit supply so that 
the network does not absorb energy from the actual data- 
line programming pulses. 

When current pulses are being applied to a device, the 
pass element is switched into the circuit. The data clamp 
will be set to a voltage level by the bit supply and will sink 
all unnecessary current. 



PULLDOWN 
CONTROL - 



SOCKET F 
SELECT 



PIN 
IB 19 20 21 [ 
SUPPLIES 




ADDRESS DEVICE 

SUPPLY ADDRESS 

RllS 



Figure 5-6. Block Diagram, Socket Card 



5-5 
981-0001 



Pins 18, 19, 20 and 21 of the 24-pin device socl<et 
receive signals directly from the waveform generator via 
the corresponding pin switches. A spike-suppression 
network is provided where the CE supply charges the RC 
network. Vcc is applied to all sockets through seven 
diodes. Remote sensing of the voltage at the selected 
socket Is provided by the analog switch of the Vcc^sense 
multiplexer. When Vcc is brought to zero, the device's 
Vcc 'i"6s can be pulled up by the Vcc pullups. The Vcc 
sense-multiplexer and a comparator on the address card 
are then used to read the Vcc voltage. If a device is 
properly inserted in a socket, the Vcc voltage will be 
above 2V. If it is in backwards it will be below IV, and if 
no device is in the socket, the voltage will approach 4V. 

The Vcc pulse switch is used to switch from a level 
set by the Vcc supply to a level set by the bit supply. The 
switch uses a HEX JFET with an RC network to control 



the rise and fall times. When the HEX FET is switched on, 
the Vcc isolation diode is reversed biased and the Vcc 
sense line sees a dummy load. The Vcc pulse switch is 
applied only to the 24-pin socket. When the switch is on, 
the .01 ;uF decoupling capacitor for the 24-pin socket is 
switched off. 

The LED decoder is used to light the LEDs below the 
selected socket. 

5.3.5 Memory Card 

The UniPak 2tm memory card is shown in figure 5-7. 
EPROMs which store the UniPak 2™ firmware are 
contained on the memory card. These EPROMs connect to 
the address bus directly and to the data bus through data 
buffers. 



DATA 
BUS 



ADDRESS SUPPLY 




♦ T T 

C3 CA C7 OVEH PAGE 1/PAGE 

CURRENT 



Figure 5-7. Block Diagram, Memory Card 



5-6 
981-0001 



Paging is used when the 16K x 8 PROMs are installed. 
Two EPROMs and a latch comprise the primary decoding 
for the entire UniPak 2tm. The EPROIVIs connect to the 12 
high-order address lines and the R/W line. Outputs from 
the primary-decoder latch connect to the secondary 
decoder and also to secondary decoders on the address 
card and the waveform generator. A 1-of-8 decoder, timed 
with V«02, provides the secondary decoding for the 
software EPROMs. Two additional lines from this decoder 
connect to the address card to provide the decode signals 
for the data gate and comparator gate/multiplexer. 
Additional outputs from the binary decoder enable the data 
buffer during all software-read operations and lower the 
data gate enable line during any access of the UniPak 2tm. 



The pulse generator consists of a count-up ripple 
counter, an 8-bit latch, and a 10-mHz crystal-controlled 
clock. The latch is connected to the data bus and is used 
to load the counter, allowing the pulse generator to be 
programmable between 0.1 and 25.5 /ys. 

The current source consists of a fixed 20-mA current 
source and a programmable current source. The control 
logic selects which current source is active. The pulse 
generator can be selected to control the programmable 
current source. 

The address supply generates the voltage necessary to 
drive the CMOS buffers located on the socket card. The 
voltage is generated from the 24V power supply using an 
NPN transistor driven by an op amp. The input of the op 
amp is a DAC, which allows the voltage to be software 
selectable. 



5-7 
981-0001 



APPENDIX A 

FAMILY AND PINOUT CODES 

ERROR CODES 



KEY TO HEADINGS AND FOOTNOTES 



• Device Part Number. The number assigned by the device 
manufacturer. 

• Family Code. A 2-digit number that designates the 
programming algorithm. 

• Pinout Code. A 2-digit number used to differentiate device 
types based on pin assignment and array size. 

• Software Version. A number in this column specifies the 
earliest software version of the 22A that will program the 
device to the manufacturer's latest specifications. 

• Approval Status. The following is an explanation of the 
symbols used in this column. 

A - Written approval obtained. 

- Device is obsolete and no longer in production. No 
approval can be obtained. Algorithm has been used and 
approved in previous Data I/O equipment. 



This algorithm is in the process of submission for 
manufacturer approval. The algorithm has been tested 
by Data I/O or the manufacturer, but no representation 
as to yield level Is made or implied. 

CAUTION 
Entry of an invalid famlly/pinout code, 
other than those listed In this table can 
cause unpredictable results at the device 
socket, which may damage a device. A 
valid family code and a valid pinout code 
may be combined to produce an invalid 
(illegal) combination. The correct 
combination for your device is published 
in this table. All family/pinout 
combinations not contained in this table 
are considered "illegal". Data I/O assumes 
no responsibility or liability for results 
produced by entry of "Illegal" 
family/pinout combinations. 



A-1 
981-0001 



Table A-1. UniPak 2^" Family and PInout Codes 



Device 








Device 








Part 


Family and 


Software 


Approval 


Part 


Family and 


Software 


Approval 


Number 


Pinout Codes 


Version Adapter Status 


Number 


Pinout Codes 


Version Adapter Status 


Advanced Micro 


Devices 






Advanced IVIIcro 


Devices IContin 


ued) 




2708 


21 27 


003 


A 


27S45 


16 77 


V04 351A-066 A 


27128 


AF 61 


V04 


A 


27S47 


16 77 


V04 351A-066 A 


27128A 


CI 51 


V05 


A 


27S49 


16 67 


003 


A 


2716 


19 23 


003 


A 


















27S65 


16 93 


V05 351A-073 A 


27266 


CI 32 


V05 


S 


27S75 


16 94 


V05 361A-073 A 


2732 


19 24 


003 


A 


27S85 


16 95 


V05 351A-073 A 


2732A 


27 24 


003 


A 


9864 


C9 A6 


V05 


A 


27512 


DO A4 


V05 


A 


















9864-3 


C9 A6 


V06 


A 


2764 


AF 33 


V04 


A 


29760A 


16 02 


003 


A 


2764A 


01 33 


V05 


A 


29751 A 


16 02 


V03 





27LS18 


16 02 


003 


A 


29760A 


16 01 


V03 


A 


27 LSI 85 


16 06 


003 


A 


















29761 A 


16 01 


V03 





27LS19 


16 02 


003 


A 


29770 


16 03 


V03 





27PS181 


16 37 


003 


A 


29771 


16 03 


V03 





27PS184 


16 06 


003 


A 


29774 


16 85 


V04 351A-067 S | 


27PS185 


16 06 


003 


A 


















29775 


16 86 


V04 351A-067 S | 


27PS191 


16 68 


003 


A 


AM9708 


21 27 


003 


A 


27PS2B1 


16 37 


003 


A 


AM9716 


19 23 


003 


A 


27PS291 


16 68 


003 


A 


AM9732 


19 24 


003 


A 


27PS41 


16 63 


003 


A 


















AM9764 


AF 33 


V04 


A 


27PS43 


16 63 


V03 


A 










27PS49 


16 67 


003 


A 


Electronic Arrays 






27S08 


15 02 


003 





2708 


21 27 


0O3 


S 


27S09 


15 02 


003 





2716 


19 23 


0O3 


S 


27S10 


15 01 


003 





Euro technique 








27S12 


16 03 


V03 


A 


ET2716 


19 23 


V04 


A 


27S13 


16 03 


V03 


A 


ET2732 


19 24 


V04 


A 


27S16 


16 79 


V04 351A-068 A 


ETC2716 


19 23 


V04 


A 










ET2764 


35 33 


V05 


S 


27S1B 


16 02 


V03 


A 










27S180 


16 37 


V03 


A 


Exel 








27S181 


16 37 


V03 


A 


2816A 


B7 23 


V05 


S 


27S184 


16 06 


V03 


A 


Fairchild 








27S185 


16 06 


V03 


A 


2708 


21 27 


003 


A 


27S19 


16 02 


V03 


A 


93417 


01 01 


003 


A 


27S190 


16 68 


V03 


A 


93427 


01 01 


003 


A 


27S191 


16 68 


V03 


A 


93436 


01 03 


003 


A 


27S20 


16 01 


V03 


A 


93438 


01 15 


003 


A 


27S21 


16 01 


V03 


A 


93446 


01 03 


003 


A 


27S24 


16 65 


V03 


A 


93448 


01 15 


003 


A 


27S25 


16 65 


V03 


A 


93460 


01 16 


003 


A 


27S26 


16 85 


V04 351A-067 A 


93451 


01 16 


003 


A 


27S27 


16 85 


V04 361A-067 A 


93462 


01 05 


003 


A 


27S2B 


16 09 


V03 


A 


93453 


01 05 


003 


A 


27S280 


16 37 


V03 


A 


93460 


01 16 


003 


A 


27S281 


16 37 


V03 


A 


93461 


01 16 


003 


A 


27S29 


16 09 


V03 


A 


93510 


01 21 


003 


A 


27S290 


16 68 


V03 


A 


93511 


01 21 


003 


A 


27S291 


16 68 


V03 


A 


93514 


01 06 


003 


A 


27S30 


16 36 


V03 


A 


93515 


01 06 


003 


A 


27S31 


16 36 


V03 


A 


93L450 


01 16 


003 


A 


27S32 


16 38 


V03 


A 


93L451 


01 16 


003 


A 


27S33 


16 38 


V03 


A 


93Z450 


A4 16 


V04 


A 


27S35 


16 66 


V03 


A 


93Z451 


A4 16 


V04 


A 


27S37 


16 66 


V03 


A 


93Z510 


A4 21 


V04 


A 


27S40 


16 53 


V03 


A 


93Z511 


A4 21 


V04 


A 


27S41 


16 53 


V03 


A 


93Z564 


A4 67 


V05 


S 


27S43 


16 63 


V03 


A 


93Z565 


A4 67 


V05 


S 



A-2 
981-0001 



Table A-1. UniPak 2™ Family and Pinout Codes (Continued) 



Device 








Device 






Part 


Family and 


Software 


Approval 


Part Family and 


Software 


Approval 


Number 


Pinout Codes 


Version Adapter Status 


Number Pinout Codes 


Version Adapter Status 


Fujitsu 








Fujitsu (Continued) 






27128 


46 61 


V04 


S 


8516 19 23 


003 


s 


2732A 


27 24 


003 


s 


8518 21 27 


003 


s 


2732A-36 


27 24 


003 


s 


8532 19 24 


003 


s 


2764 


45 33 


V04 


s 
















8742 50 57 


004 351A-070 S 


27C128 


46 61 


V04 


s 


8749H 60 57 


004 351A-070 S 


27C266 


45 32 


V05 


s 








27C32A 


27 24 


003 


s 


General Instruments 






27C64 


46 33 


V04 


s 


5716 83 23 
6816 37 23 


003 
003 


A 
A 


7051 


78 02 


003 


A 








7052 


78 01 


003 


A 


Harris 






7063 


78 03 


003 


A 


6616 88 75 


V05 


S 


7064 


78 06 


003 


A 


6641 40 47 
7602 06 02 


003 
V04 


A 
S 


7065 


78 69 


003 


A 


7603 05 02 


V04 


S 


7066 


78 02 


003 


A 








7067 


78 01 


003 


A 


7608 06 16 


003 


A 


7068 


78 03 


003 


A 


7610 05 01 

7611 05 01 


003 
003 


A 
A 


7069 


78 05 


003 


A 


7616 05 42 


003 


A 


7060 


78 69 


003 


A 








7111 


68 02 


003 


A 


76160 06 21 


003 





7112 


68 02 


003 


A 


76161 06 21 
76165 05 53 


003 
003 


A 
A 


7113 


68 01 


003 


A 


7620 06 03 


003 


A 


7114 


68 01 


003 


A 








7115 


68 03 


003 


A 


7621 05 03 


003 


A 


7116 


68 03 


003 


A 


7629 05 43 
76320 05 63 


003 
003 






7117 


68 08 


003 


A 


76321 06 63 


003 


A 


7118 


68 08 


003 


A 








7119 


68 14 


003 


A 


7640 06 15 


003 


A 


7120 


68 14 


003 


A 


7641 06 16 

7642 06 06 


003 
003 


A 
A 


7121 


68 06 


003 


A 


7642P 06 38 


003 





7122 


68 06 


003 


A 








7123 


68 09 


003 


A 


7643 06 06 


003 


A 


7124 


68 09 


003 


A 


7643P 05 38 
7644 05 04 


003 
003 






7126 


68 15 


003 


A 


7647R 05 79 


V06 351A-068 S | 


7126 


68 15 


003 


A 








7127 


68 06 


003 


A 


7648 05 09 


003 


A 


7128 


68 06 


003 


A 


7649 06 09 
76641 06 67 


003 
003 


A 
A 


7131 


68 16 


003 


A 


7680 06 16 


003 


A 


7132 


68 16 


003 


A 








7137 


68 21 


003 


A 


7680RP 06 16 


003 





7138 


68 21 


003 


A 


7681 05 16 
7681 RP 05 16 


003 
003 


A 



7141 


68 63 


003 


A 


7684 06 06 


003 


A 


7142 


68 63 


003 


A 








7143 


68 67 


003 


A 


7684P 06 06 


003 





7144 


68 67 


003 


A 


7686 06 06 
7685P 05 06 


003 
003 


A 



7151 


68 53 


003 


S 








7162 


68 63 


003 


S 


Hitachi 






7225LA 


68 16 


V06 


S 


26044 74 06 


003 





7226LA 


68 15 


V05 


S 


26045 74 06 
25084 74 06 


003 
003 






7226RA 


68 Bl 


V06 361A-066 A 


25084S 66 06 


003 





7226RS 


68 Bl 


V06 361A-066 A 








7231 LA 


68 16 


V06 


S 


26086 74 06 


003 





7232LA 


68 16 


V05 


S 


26086S 66 06 
25088 74 16 


003 
003 






7232RA 


68 B2 


V06 351A-066 A 


25088S 66 16 


003 





7237LA 


68 21 


V05 


S 








7238 LA 


68 21 


V05 


S 


25089 74 16 


003 





7241 LA 


68 63 


V05 


S 


26089S 66 16 
26168 74 21 


003 
003 






7242LA 


68 63 


V06 


S 


26168S 66 21 


003 






A-3 
981-0001 



Table A-1. UniPak 2™ Family and PInout Codes (Continued) 



Device 








Device 








Part 


Family and 


Software 


Approval 


Part 


Family and 


Software 


Approval 


Number 


Pinout Codes 


Version Adapter Status 


Number 


Pinout Codes 


Version Adapter Status 


Hitachi (Continued! 






Intel (Continued! 








25169 


74 21 


003 





8749H 


50 67 


V04 351A-070 A 


26169S 


66 21 


003 





8751 


53 68 


V04 351A-071 A 


27C32 


19 24 


003 





8751 H 


D5 68 


V06 351A-071 S 


27C32A 


27 24 


003 





8755A 


47 55 


V04 351A-072 S 


462532 


19 25 


003 


A 


Intersil 








462716 


19 23 


003 


A 


5600 


D4 02 


V05 





462732 


19 24 


003 


A 


5603A 


70 01 


003 


A 


462732P 


19 24 


003 


S 


5604 


70 03 


003 


A 










5610 


D4 02 


V05 





48016 


33 23 


003 


A 










4827128 


79 51 


003 


A 


5623 


70 01 


003 


A 


482732A 


27 24 


003 


A 


5624 


70 03 


003 


A 


482764 


79 33 


003 


A 


6716 


59 64 


003 


A 


IHughes 








Mitsubishi 








3004-1 


68 62 


V04 


S 


2708 


21 27 


003 


A 


3004-2 


58 61 


V04 


S 


27128 


79 61 


003 


A 


3008 


58 60 


V04 


S 


2716 


19 23 


003 


A 


3104-1 


58 62 


V04 


S 


2732 


19 24 


003 


A 


3104-2 


58 61 


V04 


S 


2732A 


27 24 


003 


A 


3108 


68 60 


V04 


S 


2764 


79 33 


003 


A 










54700A 


B5 01 


V05 


A 


Intel 








54701 A 


B5 01 


V05 


A 


2704 


21 26 


003 


A 










2708 


21 27 


003 


A 


54730A 


B5 02 


V05 


A 


27128 


79 61 


003 


A 


54731A 


B5 02 


V06 


A 


27128A 


93 51 


V04 


A 


54740A 


B5 05 


V05 


A 










54741 A 


B6 05 


V05 


A 


2716 


19 23 


003 


A 










27266 


93 32 


V04 


A 


8748 


52 66 


V05 


S 


2732 


19 24 


003 


A 










2732A 


27 24 


003 


A 


Monolithic Memories 














5300 


11 01 


003 


A 


27512 


4B A4 


V06 


S 




E5 01 


V06 


S 


2768 


19 22 


0O3 


A 


5301 


11 01 


003 


A 


2764 


79 33 


003 


A 




E5 01 


V06 


S 


2764A 


93 33 


V04 


A 


















5305 


11 03 


003 


A 


27C64 


93 33 


V04 


S 




E6 03 


V06 


S 


2815 


85 23 


003 


A 


5306 


11 03 


003 


A 


2816 


37 23 


003 


A 




E5 03 


V06 


S 


2816A 


A5 96 


V05 


S 


















5308 


11 08 


003 


A 


281 7 A 


BF A2 


V05 


S 




D1 08 


V05 


A 


3628 


75 16 


003 


A 


6309 


11 08 


003 


A 


3628A 


76 16 


003 


A 




Dl 08 


V05 


A 


3632 


75 63 


003 


A 


















5330 


29 02 


003 


A 


3636 


76 21 


003 


A 




E7 02 


V06 


S 


3636B 


75 21 


003 


A 


6331 


29 02 


0O3 


A 


82HS181 


75 16 


003 


A 




E! 02 


V06 


S 


82HS191 


76 21 


003 


A 


















5335 


11 14 


003 


A 


82HS321 


75 63 


003 


A 




Dl 14 


V06 


A 


82S181 


75 16 


003 


A 


5336 


11 14 


003 


A 


82S191 


76 21 


003 


A 




Dl 14 


V06 


A 


82S321 


75 63 


003 


A 


















5340 


11 15 


003 


A 


8704 


21 26 


003 


A 




Dl 16 


V05 


A 


8708 


21 27 


003 


A 


5340 J S 


11 15 


003 


A 


8741 


56 59 


V04 351A-070 S 




Dl 15 


V06 


A 


8741 A 


56 59 


V04 361A-070 S 


















6341 


11 15 


003 


A 


8742 


60 67 


V06 351A-070 S 




Dl 15 


V05 


A 


8744 


53 58 


V06 361A-071 S 


6341JS 


11 15 


003 


A 


8748 


52 56 


V04 351A-070 A 




Dl 15 


V05 


A 


8748H 


50 56 


V04 361A-070 A 
















A-4 














981 


0001 









Table A-1. UniPak 2tm Family and PInout Codes (Continued) 



Device 








Device 










Part 


Family and 


Software 


Approval 


Part 


Family and 


Software 


Approval 




Number 


Pinout Codes 


Version Adapter Status 


Number 


Pinout Codes 


Version Adapter Status 




Monolithic IVIemories (Continued) 






Monolithic 


Memories (Continued) 








5348 


11 09 


003 


A 


6362 


11 05 


003 


A 






Dl 09 


V06 


A 




Dl 05 


V05 


A 




5349 


11 09 


003 


A 


6353 


11 06 


003 


A 






Dl 09 


V05 


A 




Dl 06 


V05 


A 




5352 


11 06 


003 


A 


6380 


11 16 


0O3 


A 






Dl 05 


V06 


A 




D1 16 


V06 


A 




5353 


11 06 


003 


A 


6380JS 


11 16 


003 


A 






Dl 05 


V05 


A 




Dl 16 


V05 


A 




5380 


11 16 


003 


A 


6381 


11 16 


003 


A 






Dl 16 


V05 


A 




Dl 16 


V05 


A 




5380 J S 


11 16 


003 


A 


6381JS 


11 16 


003 


A 






Dl 16 


V06 


A 




Dl 16 


V05 


A 




5381 


11 16 


003 


A 


6388 


11 06 


003 


A 






Dl 16 


V05 


A 




Dl 06 


V06 


A 




5381JS 


11 16 


003 


A 


6389 


11 06 


003 


A 






Dl 16 


V05 


A 




Dl 06 


V06 


A 




5388 


11 06 


003 


A 


63D1641 


62 80 


V05 351A-073 A 






01 06 


V05 


A 


63D1642 


B2 80 


V05 351A-073 A 




5389 


11 06 


003 


A 


63DA1643 


AA 87 


V06 351A-073 A 






Dl 06 


V05 


A 


63DA441 


AA AC 


V05 351A-073 A 




53LS080 


18 02 


003 





63DA841 


AA AD 


V05 351A-073 A 




53LS081 


18 02 


003 





63DS1643 


AA 87 


V05 361A-073 A 




53S080 


18 02 


003 





63LS080 


18 02 


003 


A 




53S081 


18 02 


003 





63LS081 


18 02 


003 


A 




6300 


11 01 


003 


A 


63LS140 


18 01 


003 


A 






E6 01 


V06 


S 


63LS141 


18 01 


003 


A 




6301 


11 01 


003 


A 


63LS240 


18 03 


003 


A 






E5 01 


V06 


S 


63LS241 


18 03 


003 


A 




6306 


11 03 


003 


A 


63LS441 


18 05 


003 


A 






E5 03 


V06 


S 


63PL1681 


18 21 


V05 


S 




6306 


11 03 


003 


A 


63PS1681 


18 21 


V05 


A 






E5 03 


V06 


S 


63RA1681 


18 A3 


V05 


A 




6308 


11 08 


003 


A 


63RA441 


18 07 


V04 


A 






Dl 08 


V05 


A 


63RA481 


EC 66 


V06 


S 




6309 


11 08 


003 


A 


63RS1681 


18 A3 


V06 


A 






Dl 08 


V05 


A 


63RS881 


18 86 


V04 


A 




6330 


29 02 


003 


A 


63S080 


18 02 


003 


A 






E7 02 


V06 


S 


63S081 


18 02 


003 


A 




6331 


29 02 


003 


A 


63S140 


18 01 


003 


A 






E7 02 


V06 


S 


63S141 


18 01 


003 


A 




6335 


11 14 


003 


A 


63S1640 


18 63 


003 


A 






Dl 14 


V05 


A 


63S1641 


18 53 


003 


A 




6336 


11 14 


003 


A 


63S1680 


18 21 


003 


A 






Dl 14 


V06 


A 


63S1681 


18 21 


003 


A 




6340 


11 15 


003 


A 


63S1681J 


18 21 


003 


A 






Dl 15 


V05 


A 


63S240 


18 03 


003 


A 




6340JS 


11 16 


003 


A 


63S241 


18 03 


003 


A 






Dl 15 


V06 


A 


63S3281 


18 63 


V03 


A 




6341 


11 15 


003 


A 


63S440 


18 05 


003 


A 






Dl 15 


V05 


A 


63S441 


18 05 


003 


A 




6341JS 


11 16 


003 


A 


63S480 


18 09 


003 


A 






Dl 16 


V05 


A 


63S481 


18 09 


003 


A 




6348 


11 09 


003 


A 


63S840 


18 06 


003 


A 






Dl 09 


V05 


A 


63S841 


18 06 


003 


A 




6349 


11 09 
Dl 09 


003 
V06 


A 
A 


63S881 


18 16 


003 


A 










> 


\-5 














981 


-0001 















Table A-1. 


UniPak 2™ Family and Pinout Codes (Continued) 




Device 








Device 




Part 


Family and 


Software 


Approval 


Part Family and Software 


Approval 


Number 


Pinout Codes 


Version 


Adapter Status 


Number Pinout Codes Version Adapter Status 


Mostek 








National Semiconductor (Continued) 




2716 


19 23 


V03 


A 


54S572 08 06 003 





Motorola 








54S573 08 05 003 





68732-0 


26 44 


003 





74LS471 08 08 003 


A 


68732-1 


26 45 


003 





74S188 08 02 003 


A 


76161 


05 21 


003 


A 


74S287 08 01 003 


A 


76166 


06 63 


003 


S 


74S288 08 02 003 


A 


6836E16 


2D 5A 


V06 


S 


74S387 08 01 003 


A 


7620 


05 03 


003 





74S471 08 08 003 


A 


7621 


05 03 


003 


A 


74S472 08 09 003 


A 


7640 


06 16 


003 





74S473 08 09 003 


A 


7641 


05 16 


003 


A 


74S474 08 16 003 


A 


7642 


05 05 


003 





74S476 08 16 V03 


A 


7643 


05 05 


003 


A 


74S570 08 03 003 


A 


7649 


05 09 


003 


S 


74S671 08 03 003 


A 


7680 


05 16 


003 





74S672 08 05 003 


A 


7681 


06 16 


003 


A 


74S673 08 05 003 


A 


7684 


06 06 


003 





74S674 08 34 003 


A 


7685 


06 06 


003 


A 


77LS1B1 08 16 V03 


A 


MCM2532 


19 25 


003 


A 


77S180 08 16 V03 


A 


MCM2708P 


21 27 


003 





77S184 08 06 V03 


A 


MCM2716 


19 23 


003 


A 


77S186 08 06 V03 


A 


MCM2808 


81 72 


003 


A 


87LS181 08 16 003 


A 


MCM2816 


43 23 


003 


A 


87S180 08 16 003 


A 


MCM2817 


81 71 


003 


A 


87S181 08 16 003 


A 


MCM2832 


81 70 


003 


A 


87S184 08 06 003 


A 


MCM687a8 


21 27 


003 


A 


87S186 08 06 003 


A 


MCM68764 


25 29 


003 


A 


87S190 08 21 003 


A 


MCM68766 


25 29 


003 


A 


87S191 08 21 003 


A 


TMS2716 


23 28 


003 


A 


87S196 08 63 003 


A 


National Se 


miconductor 






87S280 08 16 003 


A 


2632 


19 25 


003 


A 


87S281 08 16 003 


A 


26C32 


19 26 


003 


A 


87S290 08 21 003 


A 


2708 


21 27 


003 


A 


87S291 08 21 003 


A 


2716 


19 23 


003 


A 


87S295 08 15 003 


A 


2732 


19 24 


003 


A 


87S296 08 16 003 


A 


2758A 


19 22 


003 


A 


87SR191 08 77 V06 361A-066 S | 


2758B 


19 36 


V03 


A 


87S321 08 63 003 


A 


2764 


36 33 


003 


S 


87SR181 08 66 V06 


A 


2764H 


63 33 


V05 


S 


87SR26 08 81 V04 


A 


27C16 


19 23 


003 


A 


87SR474 08 81 V05 


A 


27C16H 


BD 23 


V06 


S 


87SR27 08 86 V06 351A-067 S | 


27C32 


19 24 


003 


A 


9716 B3 23 V04 


A 


27C32H 


BD 24 


V06 


S 






2816 


37 23 


003 


A 


Nippon Electric Company, Ltd. 




2864 


C7 A6 


V06 


S 


27128 79 61 V05 


A 


54LS471 


08 08 


003 





2716 19 23 003 
2732 19 24 003 


A 
A 


64S188 


08 02 


003 





2732A 27 24 003 


A 


64S287 


08 01 


003 









64S288 


08 02 


003 





2764 79 33 003 


A 


54S387 


08 01 


003 





8741AD 66 59 V04 351A-070 S 
8748AD 52 56 V04 351A-070 S 


64S471 


08 08 


003 





8755A 47 56 V04 351A-072 S 


64S472 


08 09 


003 









64S473 


08 09 


003 





B403 72 01 003 


A 


54S474 


08 15 


V03 


A 


B405 72 16 003 
B406 72 05 003 


A 
A 


54S475 


08 15 


V03 


A 


B408 72 16 003 


A 


54S570 


08 03 


003 









54S571 


08 03 


003 





B409 72 21 003 


A 



A-6 
981-0001 



Table A-1. UniPak 2tm Family and PInout Codes (Continued) 



Device 

Part 
Number 



Family and 
Pinout Codes 



Software 
Version 



Adapter 



Nippon Electric Company, Ltd. (Continued) 

B417 72 16 003 

B419 72 42 003 

B423 72 01 003 



8426 
B426 
B428 
B429 

01(1 

2532 
2708 
27128 
2716 

2732 
2732A 
2758 
2764 

8755A 

Raytheon 

29600 
29601 
29602 
29603 



29632 
29632SM 
29633 
29633SM 

29634 
29635 
29636 
29637 

29640 
29641 
29642 
29643 

29650 
29661 
29652 
29663 

29660 
29661 
29662 



72 
72 
72 
72 



19 
21 
79 
19 

19 
27 
19 
79 



11 
11 
11 
11 

11 
11 
11 
11 

11 
11 
11 
11 

11 
11 
11 
11 

11 
11 
11 



15 


003 


05 


003 


16 


003 


21 


003 


25 


003 


27 


003 


51 


003 


23 


003 


24 


003 


24 


003 


22 


003 


33 


003 



08 
08 



16 
16 
16 
16 

16 
16 
16 
16 

63 
63 
53 
63 

06 
06 
06 
06 

01 
01 
01 



003 
003 
003 
003 



29610 


11 


03 


003 


29611 


11 


03 


003 


29612 


11 


03 


003 


29613 


11 


03 


0O3 


29620 


11 


09 


003 


29621 


11 


09 


003 


29622 


11 


09 


003 


29623 


11 


09 


003 


29624 


11 


15 


003 


29625 


11 


16 


003 


29626 


11 


15 


003 


29627 


11 


16 


003 


29630 


11 


16 


0O3 


29630SM 


11 


16 


003 


29631 


11 


16 


003 


29631SM 


11 


16 


003 



003 
003 
003 
003 

003 
003 
003 
003 

003 
003 
003 
003 

003 
003 
003 
003 

003 
003 
003 



Approval 
Status 



A 
A 
A 
A 

A 
A 
A 
A 

A 
A 
A 
A 

A 
A 
A 
A 

A 
A 
A 
A 

A 
A 
A 
A 

A 
A 
A 
A 

A 
A 
A 
A 

A 
A 
A 
A 

A 
A 
A 



Device 

Part 
Number 



Family and 
Pinout Codes 



Software 
Version 



Adapter 



Raytheon (Continued) 

29663 11 



29671 
29673 




29680 




29680SM 




29681 




29681 SM 




29682 




29682SM 




29683 




29683SM 




Ricoh 




RD6H32 


27 


Rockwell 




R87C32 


27 


87C64 


93 


Seeq 




27C256 


93 


5133 


79 


281 6A 


B7 


2816AH 


DF 


6616A 


B7 


6616AH 


DF 


5133H 


79 


5143 


79 


2817A 


BF 


5517A 


BF 


6213 


A6 


6213H 


B9 


52B13 


A6 


52B13H 


B9 


2817AH 


BF 


551 7AH 


BF 


52B23 


AB 


52B23H 


Fl 


62B33 


AB 


52B33H 


Fl 


SGS Technology 


2532 


19 


2716 


19 


2764 


35 


Signetics 




2708 


21 


82123 


10 


82LS135 


10 


82LS137 


10 


82HS195 


CF 


82LS180 


10 


82LS181 


10 


82PS180 


10 


82PS181 


10 


82HS321 


CF 


82S123 


10 


82S126 


10 


82S129 


10 


82S130 


10 



63 


003 


63 


003 


21 


003 


21 


003 


21 


003 


21 


003 


21 


003 


21 


003 


21 


003 


21 


003 



24 


V05 


33 


V06 


32 


V06 


33 


V04 


23 


V06 


23 


V06 


23 


V05 


23 


V06 


33 


V04 


51 


V04 


A2 


V05 


A2 


V05 


96 


V04 


96 


V05 


96 


004 


96 


V05 


A2 


V05 


A2 


V06 


97 


V05 


97 


V05 


98 


V05 


98 


V06 


25 


002 


23 


003 


33 


V05 


27 


003 


02 


003 


08 


003 


05 


003 


63 


V06 


16 


003 


16 


003 


16 


003 


16 


003 


63 


V06 


02 


003 


01 


003 


01 


003 


03 


003 



Approval 
Status 



A 
A 
A 
A 

A 
A 
A 
A 

A 
A 



S 
A 
S 
S 

S 

S 
A 
A 

S 
S 
A 
A 

A 
A 
S 
S 

A 
A 
A 
A 



A-7 
981-0001 



Table A-1. 


UniPak 2™ Family and Pinout Codes (Continued) 




Device 






Device 




Part Family and 


Software 


Approval 


Part Family and Software 


Approval 


Number Pinout Codes 


Version 


Adapter Status 


Number Pinout Codes Version Adapter Status 


Signetics (Continued) 






Texas Instruments (Continued) 




82S131 10 03 


003 


A 


28P166 13 21 003 


A 


82S136 10 08 


003 


A 


28P42 13 09 003 


A 


82S136 10 05 


003 


A 


2BP45 13 15 003 


A 


82S137 10 05 


003 


A 


28P85 13 16 003 


A 


82S140 10 15 


003 


A 


28S166 13 21 003 


A 


82S141 10 16 


003 


A 


28S2708 13 16 003 


A 


82S146 10 09 


003 


A 


28S42 13 09 003 


A 


82S147 10 09 


003 


A 


28S46 13 15 003 


S 


B2S180 10 16 


003 


A 


28S46 13 15 003 


A 


82S181 10 16 


003 


A 


28S85 13 16 003 


A 


B2S182 10 16 


003 


A 


28S86 13 16 003 


A 


82S183 10 16 


003 


A 


28SA166 13 21 003 


A 


B2S1B4 10 06 


003 


A 


28SA42 13 09 003 


A 


82S185 10 06 


003 


A 


28SA46 13 15 003 


A 


82S190 10 21 


003 


A 


38S16 Al 21 V06 


S 


82S191 10 21 


003 


A 


28SA86 13 16 003 


A 


82S196 10 53 


003 


A 


54LS478 13 16 003 





82S23 10 02 


003 


A 


54S476 13 38 003 





82S2708 10 16 


003 


A 


54S477 13 38 003 





82S321 10 63 


003 


A 


38S030 Al 02 V06 


S 


27C64 36 33 


003 


S 


545478 13 16 003 

545479 13 16 003 






Synerteit 










2716 19 23 


003 


A 


74LS478 13 16 003 
74S2708 13 16 003 



Q 


Texas Instruments 






74S454 13 06 003 





24S10 13 01 


003 


A 


74S455 13 06 003 





24S166 13 53 


003 


A 






24S41 13 38 


003 


A 


74S476 13 38 003 





24S81 13 06 


003 


A 


745477 13 38 003 

745478 13 16 003 






24SA10 13 01 


003 


A 


74S479 13 16 003 





24SA166 13 53 


003 


A 






24SA41 13 38 


003 


A 


TMS2716 23 28 V03 


A 


24SA81 13 06 


003 


A 


Tliompson 




2508 19 22 


003 


A 


71190 92 21 003 


S 


2516 BD 23 


V05 


A 


71191 92 21 0O3 


S 


2532 BD 25 


V05 


A 






2564 BD 30 


VOS 


A 


Toshiba 

27128 79 51 003 


S 


25L32 19 25 


003 


A 


2732 19 24 003 


S 


2708 21 27 


003 


A 


2732A 27 24 003 


s 


27128 79 51 


V03 


S 


2732D 19 24 003 


s 


2732 BD 24 


V05 


A 


2764 79 33 003 


s 


2732A 63 24 


V05 


A 


321 21 26 003 


s 


2764 79 33 


003 


A 


322 21 27 003 


s 


27L08 21 27 


003 


A 


323 19 23 003 


s 


28L166 13 21 


003 


A 












8756AC 47 55 V04 351A-072 S | 


28L22 13 46 


003 


A 






28L42 13 09 


003 


A 


Xicor 




28L45 13 16 


003 


A 


2804A B7 82 V05 


s 


28L85 13 16 


003 


A 


281 6 A B7 23 V05 
2864A C3 98 V05 


s 
s 


28L86 13 16 


003 


A 






28LA22 13 46 


003 


A 







A-8 
981-0001 



ERROR CODES 



NOTE 
In the case of an error condition, be sure that the family and pinout codes are correct for the PROM installed; 
refer to table A-1 in appendix A to cross check family and pinout codes. 



CODE 


NAME 


21 


Illegal-Bit Error 


23 


First-Pass Verify Error 


24 


Second- Pass Verify Erro 


27 


Insufficient RAM 


30 


No Programming 
Algorithm 


31 


Excesive Current Drain 


32 


Backward Device 


35 


Faulty Chip Select 


37 


Socketing Error 


38 


Illegal Operation During 
Calibration 


39 


Failure to Lock 
Security Fuse 


70 


Faulty Bit Supply 


71 


Faulty CS Supply 


72 


Faulty Vcc Supply 


A1 


No Identifier Found 


A2 


Invalid Identifier 



BO 
B1 



Byte Erase Error 
Chip Erase Error 



DESCRIPTION 

The device cannot be programmed due to already programmed locations of 
incorrect polarity. 

The device data was incorrect on the first pass of the automatic verify sequence 
during device programming. 

The device data was incorrect on the second pass of the automatic verify 
sequence during device programming. 

Due to the value of the Begin RAM Address, there is insufficient RAM to 
program the device, or the total allotment of RAM resident is less than the 
word limit of the device. 

Valid family and pinout codes are not selected, or family code selection not 
followed by pinout code selection. 

The operation aborted due to excessive current drain by a device. 

The operation aborted due to Vcc '^vel test indicating a backward device. 

The operation aborted due to data being present while a device is disabled. 

Operation aborted due to a low Vcc '^vel indication on sockets presumed to be 
empty. A device may be in the wrong socket, or two or more devices may be 
socketed simultaneously. 

An illegal or invalid operation was attempted during calibration. 

The security bit did not program and the device is not locked. 

The operation aborted due to a faulty bit supply. Do not use UniPak 2™ until 
repaired. 

The operation aborted due to a faulty CS supply. Do not use UniPak 2™ until 
repaired. 

The operation aborted due to a faulty Vcc- Do not use UniPak 2™ until 
repaired. 

The device does not have an electronic identifier. The electronic identifier mode 
cannot be used. 

The electronic identifier of the device has been read and it indicates that the 
device cannot be programmed using the selected family and pinout codes. 
Consult table A-1 for the correct family and pinout codes. Try again using these 
codes. 

The device does not have a byte erase mode. Block limits must be removed and 
a chip erase performed. The entire chip may then be reprogrammed. 

The device does not have a chip erase mode. 



A-9 
981-0001 



This page left intentionally blank. 



A-10 
981-0001 



APPENDIX B 

TIMING DIAGRAMS 



B-1 
981-0001 



APPENDIX C 

SCHEMATICS 



30-702-1650 


Rev E 


Memory Card 


30-701-1655 


Rev B 


Address Card 


30-702-1659 


Rev D 


Socket Card 


30-702-1661 


Rev A 


Motherboard 


30-701-1690 


Rev A 


Waveform Generator 



C-1 
981-0001 



8 



GND 



DATA BUFFERS 



GATI 
ENABLE 



B 



Ao 

'^l 

A2 

A3 

A4 

A5 

Ae 

A7 

As 

Ag 

A10 
All 
A12 
Al3 
Al4 

A15 
R/W 



CC 




SOFTWARE PROMS 



< 



1 



2 
A 



<7 



PRIMARY DECODE 



DECODE LATCH 



V02 
♦5 



25 



15 




J1 



C3,C7, T 
C9,C10, 

:ii,ci4T 

0.1 L 



^ 



- + 5 



74HC32 



'12 



f 




R18 
2.2K 



J 



:^ 



3 



-% 



♦♦5 



•5 — A\^ 



Rig 



2.2K 



i 



\ 



■^^-012 
•22/15V 



-L — / JP2 \E> 



74HC32 




74HC32 



SECONDARY DECODE 



6- 



4 



.16 



U7 



74LS138 



=0 S5A 
6 



vi:^ 



Y2 > 



G1 



VCC 



"^s^: 



Y7 



10 



J 4 



,13 



12 
J1 



NC 



.10 



BB 



J1 22 21 



23 24 



PULSE GENERATOR 

•5 



10 



II 



T CLR 




•5 



12 



11 



_ioi_ 

PRE 



D u 1 2 Q 

74LS74 
CLK Q 

CLR 
J37- 



74S04 



1^ 1 .y 

~^^ 



IiIZ, 



PRE 

°U12 ° 
74LS74 

► CLK 5 

cm 



^ 



-NC 



R13 
3.3K 



7426 



"s? 



♦5 



DATA BUS 

(2.C8; 



13 



ADDRESS LATCH 



tr 




DATA 

U15 

74LS259 





SECONDARY DECODE 
♦5 



16 



A"' 

B 
C 

G2A 

G2B 



'4 



U6 Y7 

74LS138 



PAGE 1/ PAG EO 



C2 C1 C4 C3 C7 



CI 1 



15 



IP 



-NC 
^NC 

Lnc 

^NC 
'-NC 
NC 



J1 



CURRENT DAC PULSE EN 
(2.88) 

CURRENT DAC CONTROL 

'2.88) 



20 MA CONTROL/ 
CURRENT DAC 
(2.B8) 



ADDRESS DAC CS 
(2.A8) 

CURRENT DAC CS 

(2.C8) 



DESCRIPTION 



RELEASE 



ECN 4760 



ECN 4768 



ECN 4827 



ECN 488'5 



MP/ 
AK 



CL 



CL 



CL 



BV 



CHK 



^*1 



-lij. 



APPR'D 



^''vVc 



Ojc 



^idsnjc 



(H-ry 



e^y 



DATE 



l/fJZ. 



Ai'i 



Wi 



sl21 



iM 



NOTES: UNLESS otherwise specified. 

1. resistors are 1/4W AND IN OHMS, 5% 

2. CAPACITORS are 50V AND IN MICROFARADS 10%. 

3. LAST REFERENCE DESIGNATORS USED: 
R33,C14,CR4,VR3,U23.Q3.Y1,JP2 

REFERENCE DESIGNATORS NOT USED: 
U1.R22,R23 

4. CONNECTIONS NOT SHOWN; 



I.e. NO. 


.5 


GND 


U4 


14 


7 


U11 


14 


7 


U17 


14 


7 




5. UNUSED GATES: 
'74S04 



[6>-002 INSTALL JPI AND JP2 IN POSITION B, 
-002 INSTALL JPI AND JP2 IN POSITION A. 



B 



702-IG50-002 SHO^N 
702-1650-003 AS NOTED 



OVER 
CURRENT 



APPROVALS: 



DSN ENGR 



UNLESS OTHERWISE 
SPECIFIED DIMENSIONS 
ARE IN INCHES 




DKOil/O 



SCHEMATIC DIAGRAM, 
MEMORY BOARD 



SIZE 

D 



CODE INDENT 
NO 

54193 



DRAWING NO 



30-702-1650 



SCALE NONE 



SHEET 1 OF 2 



B 



8 



DATA BUS(i.B3) 



CURRENT DAC CS 

(1.A3) 



PULSE CONTROL 
(1.D3) 



CUPRENTJJAC 
PULSE EN {1.B3r 

CURRENT DAC 
CONTROL (1.B 3) 



20 MA CONTROL/ 
CURRENT DAC EN 
(1.B3) 



ADDRESS DAC CS 

(1.A31 



CURRENT SOURCE 



R1 1 
lOK 



+5 



r 



r 




U22 

LM14e 




♦48 



1N5338A 



10[ V 

_9 UllV 



7426 
B 



•^ I "ro.1 -ri.0,20% 

I R2 2<^R3 I 

. SCO >-►< 5K I ' • • 1 

115T ^ ZOT» I 



3^ 



74HC32 



R5 
330 



110 



Q3 

MPQ372SA 



+5 



3 



10 



ADDRESS SUPPLY 



V 



RFB 
OUT1 

OUT2 



GND 

U23 

AD7524 

VRE F 

CS WR 
Vl2 V13 






22 

LM148 



R26 

-AAAr- 

1K 



-1-C6 



♦24 



— b-Ti C1 



02 
PN2222 



U22 

LM148 



C13 



-^T — 

0*/;- eR3 



o 



"'xV-^^ 



R27 

-AA/V- 

2.7K 



1 



V 



15 



^R2£ 
''lOK 
*1V. 



R20 

-AAAr- 

2.2K 



,R24 
,10K 



VR2 
TL431 



-9 



wU^ 






H2a 

500 
15T 



— o 

V 



REVISIONS 



DESCRIPTION 



SEE SHEET ONE 



DR CHK APPRO DATE 



J1 



19 



*48 

BIT SWITCH 



*2A 



20 ADDRESS SUPPLY 



16 -9 



APPROVALS: 



UNLESS OTHERWISE 
SPECIFIED DIMENSIONS 
ARE IN INCHES 




DMA I/O 



SCHEMATIC DIAGRAM, 
MEMORY BOARD 



SIZE 

D 



CODE INDENT 
NO 

54193 



SCALE NONE I 



DRAWING NO 



30-702-1650 



[sheet 2 OF 2 



B 



8 



PAS PAQ PA10 PA12 PA14 
PAS rA» PAJ 1 PA 13 ^ PA lb 



PI 



AO 
A1 
A2 
A3 
A4 
A5 



J/ 



2/ 



t/ 



^ 



S/ 



V 18 



NLiZ 



ADDRESS LATCH 

♦5 
20 




1 1 



\3 14 i 



^ 13 



U29 

74 
LS373 



OE 
T7~ 



19 



V 




S 6 10 



v^_M 



•5 
13 Il6 



DAT 



U2 
74LS259 



1 sYi -M 



SECONDARY 
DECODE 



C3 
C4 

C5 



L.O. 

ADDRESS 

LATCH 



va. 



<0_5 



S i 2 7 



\13 9 



S j'^IO 



S i511 



|13 
DATA 



•■5 



U3 

74LS259 




Z 



H.O. 

ADDRESS 

LATCH 



^ 



EE 


'H 








FF 


6/ 






HH 


y 





^ 



♦5 
13 16 




U18 

74LS259 



CLEN 



il 



J 



SOCKET 
SELECT 
LATCH 



^( 



CLAMP SWITCH 
2.A2) 



U^>ol2 

7 4LSOS 

_ DATA SWITCH 

^^AN^E SELECT 1^ 

— LOAD RANSE 
SWITCH 
(2.A8) 






DESCRIPTION 



RELEASE 



ECN 4782 



CL 



APPRO 






is: 



♦ s 

13 |l6 



RP7 I , 
2.2K I < 



■I 



LATCHED ADDRESS(2.A4) 



U4 

74LS259 




^B^ 



•_£ ?|CURRENT SOURCE j^ 
CR2 LATCH 



^-7L_4;^>ii — p^ 

1 , I 1 ^^ '^,1N414e 

l__n l^ h^ (3 PLACES) 

9__~1 I 5.u1>>6|.^p3 

10.,, \^ , 



isZ 



(2j>e) 



RS 
100K IV. 

— ^AA^ 




>f 



<38;PIN 18 
(39)PIN 19 



7407 
(4 PLACESJ 



^ 



ADDRESS SUPPLY 
5V SELECT 



\1_8;oVER CURRENT 
ENABLES(2.B8) 



SUPPLY 
COMPARATORS 



NOT SHOWN 



IC. NO. 


*5 


GND 


U22 
U14 


PIN 14 
PIN 14 


PIN7 
PIN7 



UNUSED GATES: 



♦PROS 



(2>3) 



23 26 DD 



PI 



[i] a H S"^ 



DO 1 D02 D03 D04 DOS D06 D07 DOB 



RAW OPER- 

*18 ATE SENSE 



•5 



'PROG 



+24 





BIT SW.(2.D3) 

GATED DATA (2.88) 
LATCHED DATA(2.D8) 



NOTES: UNLESS OTHERWISE SPECIFIED 
I. ALL RESISTORS ARE I/4W AND IN OHMS, 5%. 

2. ALL CAPACITORS ARE IN MICROFARADS, 10%. 

3. LAST REFERENCE DESIGNATOR USED: 
TP4.CR13,JP1,Jl,C18.U29,Q17,R3e, RP13,P1 

NOT USED Ct,CRll,05, U7, U8, U9,U10.U12,U13,Ut5,R25,CRlO 

4. DELETED AT REV. B. 



B 



30-701-1655-002 SHOWN 



PAGE 1 /PAGED 



APPROVALS: 



G INGR, 



QUAL ASSUR 



ENGR MGR 



DATE 



DATE 



DATE 



DATE 



UNLESS OTHERWISE 
SPECIFIED DIMENSIONS 
ARE tN INCHES 



TOLERANCES UNLESS 
OTHERWISE SPECIFIED 



XXX 
ANGULAR 



DRAWN BY 



CHECKED BY 



:^ 



DATE 
81 



DATE 

iL. 



DMA I/O 



SCHEMATIC DIAGRAM, 
ADDRESS CARD 



SIZE 

D 



CODE IDENT 
NO 



DRAWING NO 

30-701-1655 



SCALE NONE 



SHEET 1 OF 2 



RELEASE 



ECN 4742 



ECN 4772 



ECN 4831 



DATA CLAMPS 




REVISIONS 



U E. S C R I P T 1 N 



CHK 



^^ 



B^ 



CM. 



9^ 



PE 



£73; 



^s^ 



pf 



DATE 



'/--' 



Mil. 



a/?3 



»/83 



NOTES: UNLESS OTHERWISE SPECIFIED 

ALL RESISTORS ARE 1/4W AND IN OHMS, 5% 

ALL CAPACITORS ARE IN MICROFARADS, 50 VOLTS 



LAST REFERENCE DESIGNATOR USED; 

CR34 U22 RP1 R30 TP1 C22 J1 QIO 
REFERENCE DESIGNATORS NOT USED- 
U2, U6, U8, UI2, U14, U15. U16, U19, R2I, CI6 . 



004 SHOWN. 



Dtsnu/o 



SCHEMATIC DIAGRAM 
SOCKET BD. 



CODE IDENT NO 

54193 



D R AW I N G NO 

30-702-1659 



ISHEET 1 OF 1 



B 



8 



BIT 
SWITCH 



B 




74LS0^ 



♦PROQ C37 

♦PROG [2^ i ,1 1 ^ 



-9 

«24 

♦5 
GND 



ADRESS 
SUPPLY 



Eh — '^ 



C35 
22/15V 



i J! ^ 



OVER- 
CURRENT 



21 



DD 



26 



♦5 



C23,28,34 
I .01/ 100V 



23 



C39 
22/15V 



VCC SUPPLY 



^ 



^ 






DATA °61 
EN CLR '^ 



■ADDRESS SUPPLY 
(2,B3) 




REVISIONS 



DESCRIPTION 



RELEASE 



Mi 



CM. 



A) 



Am. 



PE. 



DATE 



'i/gz 



-5V SUPPLY 
"OVERCURRENT 

(2,B8) 

- VCC (2,D8) 

-VCC SENSE 

(2,D8) 



• BIT SUPPLY 

(2,D8) 

■CE SUPPLY 

(2,D8) 



02 
MJEaOO 




19 V 

T09 -^ 



CR 
5FT09 



BIT 

&«I>ITCH 

(2.C8) 



BIT 



NOTES: UNLESS OTHERWISE SPECIFIED 
I. ALL RESISTORS ARE I/4W AND IN OHMS, 5%. 

2. ALL CAPACITORS ARE IN MICROFARADS, 50V, 10%. 

3. LAST REFERENCE DESIGNATOR USED = 
R71, C40. RP3. Q25. U20, CR18, TP4, VR2 

4. 



10. NO. 


♦5V 


ONO 


U17-19 


16 


8 


U 16,20 


20 


10 


U5,8-11 


14 


7 



SWITCH '.e 

(2.Ae) 
SWITCH CONTROL BUS 



B 



CURRENT 
SOURCE 



(2,08) 



— CURRENT 
SOURCE KHJ. 

(2.08) 



PNOJ. EN6. 



Res 

3.9K 



74LS04 



033 
.0022 



APPROVALS; 



^ 



i):a^&fi-^ 



ttn- 



c 



UNLCSS OTHERWISE 
SPECIFIED DIMENSIONS 
ARC IN INCHES 



TOLERANCES 
DECaiALS ANWJLAR 

.X ± 
.«« 1 
.XX)L i 
DO IWT SCALE PRAWIW 



DRAWN BY It-B 1 

JAEHEE KIM 



CHECKED BY: 



!)<-" 



DAaAI/O 



SCHEMATIC DIAGRAM , 
WAVEFORM GENERATOR 



CODE (DENTNO 

54193 



R AW I N G NO 



30-701-1690 



LE I 12/2/81 | SHEET 10F 2 



B 



8 



<^ 



(^ 



AO 



<I> 



^6 



<£> 



<£> 






<£> 



A3 



<!> 



A4 



A9 



<!> 



Mo 



A11 



<^ 



G^ 



A13 






A16 



0OO1 




<i> 



DO9 






<M> 



D0-> 






D04 



DO^ 



0- 



DOfi 






0^ 



©- 



DO. 



Jl 



H 



10 



1 1 



12 



13 



14 



15 



16 



H 

J2,J3 



[D 



d 



H 



S 



Q 



S 



E 



El 



B 







S 






El 

13" 



F1 



^ 



©- 



<^ 



VOL/VOH 



0-^ 



♦ 24 



<£>-^ 



PROS 



@^ 



Jl 



^ 



GND 



OPERATE 



SENSE 



UNREG H.V. 



GATE ENABLE 



EXTEND 



IRQ 



•48 



R/W 



« 1 aV RAW 



V-02 



PP 



INTERLOCK 



RR 



0-^ 



OV RAW 



READ 



WRITE 



FWD 



RESET 



AA 



BB 



CC 



KK 



25 



LL 



MM 



NN 



PP 



RR 



M 



PAGE 1 /PAGE O 



ADDRESS SUPPLY 



C11 



20 



21 



• 24 



22 



23 



26|DD 



24 



JJ 



30 



*48 



31 



32 



33 



34 



35 



J2,J3 



36 



27 



EE 



C4 



Cl 



28 



FF 



C5 



m 



'si 



H 



DESCRIPTION 



RELEASE 



Q 



Q 



HD 



Kyf^ 



^H 



. u I V . 



H 



H 



^ 
^ 



C2 



29 



HH 



C6 



C3 



c? 



{aa] 



PULSE 



a 






R.B. 



CHK 



OVERCURRENT 



VCCPULSE 1 ^ ^ 



S 



BIT SWITCH ^V> 



PI 



APPROVALS: 



DSN ENGR 



MFG ENGR 



QUAL ASSUR 



UNLESS OTHERWISE 
SPECIFIED DIMENSIONS 
ARE IN INCHES 



RANCES. UNLESS 
SPECIFIED; 




DRAWN BY: 



S. BENN '«;"" 



CHECKED BY 



DKOLl/O 



TITLE SCHEMATIC DIAGRAM; 
MOTHERBOARD 



SIZE 

D 



CODE INDENT 
NO 



DRAWING NO 



30-702-1661 

JSHEET 1 OF 1 



B 



8 



VCC CE •'T BIT 

VCC SENSE SUFPLY SUPPLY SWITCH dVeM:uMENT~ 

01 (^ ^ ^ @ ® (^ 



vcc- 

(1J>3) 
VCC SENSE - 



(1J>3) 

CE , SUPPLY - 
{1.C3) 

BIT SUPPLY ■ 
(1.03) 
CURRENT SOURCE 



REFERENCE (1£3) 



CURRENT SOURCE KILL- 
(1^3) 



BIT SWITCH 

(1.C2) 
(IBS) 

SWITCH CONTROL, 
BUS 



VREF 

(ij>e) 




115 J 

MJE240> R8 



DAG REF 



74LS04 



10 




110 






-5 SUPPLY 
OVERCURRENT 

(1.D3) 



BIT SWITCH ♦.« 
(1.B2) 



J1 
^)PIN 18 



I PA 11 




r^ 



71 



©ADDRESS 
SUPPLY 



LR10 



200V I > /t^^MjEa-il 



CR2 



,19 



^ 



v_ 




• RS 

'330 



+ 5 

1. 



1N4003 ' 



014 

MJE240V 



R7 

2.2K 

1/2W 



T C2 

I'^470j)< 
200V^ 



J1 

(39) PIN 19 



"@) BIT SWITCH CONTROL 



J1 



o 



PA12 



R64 

■vW- 
4 7K 



9y DOWN 
CONTROL 



APPROVALS 



OUAL.ASSUR. 



EMeRJMSN. 



DATE 



TOL€RANCES 
:jECIM«LS ^ ANGULAR 

< t 



•^C^ SCALE OKAWIWC 



JAEHEE KIM 



^ 



n L " ^ ' L 81 



^tii- "' 



DAIAI/O 



SCHEMATIC DAGRAM, 
WAVEFORM GENERATOR 



30-701-1690 



12/2/B1 



2 QFg