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Full text of "USPTO Patents Application 10581639"

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wo 2005/059989 



PCT/IB2004/052742 



CLAIMS: 

1. A method for forming an epitaxial base layer in a bipolar device, comprising: 

5 providing a structure having a field isolation oxide region (12) adjacent to an active 

silicon region (10); 

forming a silicon nitride/silicon stack (14,16) above the field isolation oxide region 
(12), wherein the silicon nitride/silicon stack includes a top layer of silicon (14) and a 
bottom layer of silicon nitride (16); 
10 performing an etch to the silicon nitride/silicon stack (14,16) to form a stepped seed 

layer, wherein the top layer of silicon (14) is etched laterally at the same time the bottom 
layer of silicon nitride (16) is etched; and 

growing an Si/SiGe/Si stack (20) over the stepped seed layer and active silicon 

region. 

15 

2. The method of claim 1, wherein the lateral etching of the silicon layer (14) is self- 
aligned to the etch of the silicon nitride layer (16). : - 

3. The method of claim 1, wherein the field isolation oxide region comprises a shallow 
2 0 trench isolation (STI) region. 

4. The method of claim 1, comprising the further step of forming a silicon oxide layer (17) 
between the field isolation oxide region and the silicon nitride/silicon stack. 

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wo 2005/059989 



PCT/IB2004/052742 



5. The method of claim 1, wherein the step of performing an etch to the silicon 
nitride/silicon stack comprises the steps of: 

performing an anisotropic polysilicon etch; and 

performing an anisotropic nitride etch with an isotropic polysilicon etch. 

5 

6. The method of claim 5, wherein a Cl2/HBr chemistry is used for the anisotropic 
polysilicon etch. 

7. The method of claim 5, wherein the silicon nitride layer is anisotropically etched in the 
10 presence of ions, and the silicon layer is laterally isotropically etched with radicals. . 

8. The method of claim 1, wherein the step of growing a Si/SiGe/Si stack is done with a 
differential epitaxial growth (DEG) process. 

15 9. The method of claim 1, wherein the silicon layer is laterally etched at least 200 nm. 

10. A structure for forming an epitaxial base layer in a bipolar device, comprising: 

a silicon nitride/silicon (14,16) above a field isolation oxide region (12), wherein 

the silicon nitride/silicon stack (14,16) includes a top layer of silicon (14) and a bottom 
20 layer of silicon nitride (16), and wherein the top layer of silicon is laterally stepped back 

from the bottom layer of silicon nitride to form a stepped seed layer; and 

a smeared Si/SiGe/Si layer (20) formed above both the stepped seed layer and an 

adjacent active silicon region (10). 



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wo 2005/059989 



PCT/IB2004/052742 



11. The structure of claim 10, wherein the top layer of silicon is laterally stepped back at 
least 200 nanometers. 

12. The structure of claim 10, wherein the field isolation oxide region comprises a shallow 
5 trench isolation (STI) region. 

13. The structure of claim 10, further comprising a silicon oxide layer (17) between the 
field isolation oxide region and the silicon nitride/silicon stack. 

10 14. A method for forming an epitaxial base layer in a bipolar device, comprising: 

providing a structure having a field isolation oxide region (12) adjacent to an active 
silicon region (10); 

forming a silicon nitride/silicon stack (14,16) above the field isolation oxide region 
(12), wherein the silicon nitride/silicon stack includes a top layer of silicon (14) and a 
15 bottom layer of silicon nitride (16); 

substantially covering the field isolation oxide region (12) with a mask (32); and 
performing an etch to the silicon nitride/silicon stack (14,16) to form a stepped seed 
layer, wherein the top layer of silicon (14) is etched laterally at the same time the bottom 
layer of silicon nitride (16) is etched vertically. 

20 

15. The method of claim 14, comprising the further step of: growing an Si/SiGe/Si stack 
(20) over the stepped seed layer and active silicon region. 



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wo 2005/059989 



PCT/IB2004/052742 



16. The method of claim 14, wherein the lateral etching of the silicon layer (14) is self- 
aligned to the etch of the silicon nitride layer (16). 

5 17. The method of claim 14, wherein the field isolation oxide region comprises a shallow 
trench isolation (STI) region. 

18. The method of claim 14, comprising the further step of forming a silicon oxide layer 
(17) between the field isolation oxide region and the silicon nitride/silicon stack. 

10 

19. The method of claim 14, wherein the silicon layer comprises polysilicon. 

20. The method of claim 14, wherein the step of performing an etch to the silicon 
nitride/silicon stack comprises the steps of: 

15 performing an anisotropic polysilicon etch; and 

performing an anisotropic nitride etch with an isotropic polysilicon etch. 



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