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Full text of "USPTO Patents Application 10825796"

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ABSTRACT 

A semiconductor mounting arrangement inclusive of a heat sink member enabling 
desirable resistance to physical impact damage to the semiconductor device, the heat sink 
and the printed circuit board supporting the semiconductor device and the heat sink. The 
heat sink is fabricated of thermally and electrically conductive metal such as copper and 
captured by metallic interconnection such as soldering to conductors of the printed circuit 
board. Efficient thermal and electrical conductivity between semiconductor device and heat 
sink are achieved also by metallic interconnection such as soldering intermediate the 
semiconductor device and the heat sink. Desirable semiconductor device performance 
under extreme electrical and physical force transient loading conditions are disclosed. 


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